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[WebAssembly] Fix stack offsets of return values from call lowering.

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Summary: Fixes PR35220

Reviewers: vadimcn, alexcrichton

Reviewed By: alexcrichton

Subscribers: pepyakin, alexcrichton, jfb, dschuff, sbc100, jgravelle-google, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D39866

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317895 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jatin Bhateja 2017-11-10 16:26:04 +00:00
parent 9239900417
commit be808009ac
2 changed files with 14 additions and 3 deletions
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4
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -8044,10 +8044,10 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
uint64_t Offset = OldOffsets[i];
MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT);
unsigned RegisterVTSize = RegisterVT.getSizeInBits();
unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
RetTys.append(NumRegs, RegisterVT);
for (unsigned j = 0; j != NumRegs; ++j)
Offsets.push_back(Offset + j * RegisterVTSize);
Offsets.push_back(Offset + j * RegisterVTByteSZ);
}
}

13
test/CodeGen/WebAssembly/umulo-i64.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that UMULO works correctly on 64-bit operands.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-emscripten"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
; CHECK: __multi3
@ -19,3 +19,14 @@ declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
attributes #0 = { inlinehint }
attributes #1 = { nounwind readnone speculatable }
; CHECK-LABEL: wut:
; CHECK: call __multi3@FUNCTION, $2, $0, $pop0, $1, $pop10
; CHECK: i64.load $0=, 8($2)
define i1 @wut(i64, i64) {
start:
%2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
%3 = extractvalue { i64, i1 } %2, 1
ret i1 %3
}