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Add braces for legibility.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115043 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-09-29 17:32:29 +00:00
parent 69c4cbe9e8
commit be91232900
1 changed files with 2 additions and 1 deletions
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3
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -289,7 +289,7 @@ bool ARMDAGToDAGISel::SelectAddrMode2(SDValue N,
}
// Match simple R +/- imm12 operands.
if (N.getOpcode() == ISD::ADD)
if (N.getOpcode() == ISD::ADD) {
if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
int RHSC = (int)RHS->getZExtValue();
if ((RHSC >= 0 && RHSC < 0x1000) ||
@ -312,6 +312,7 @@ bool ARMDAGToDAGISel::SelectAddrMode2(SDValue N,
return true;
}
}
}
// Otherwise this is R +/- [possibly shifted] R.
ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::ADD ? ARM_AM::add:ARM_AM::sub;