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Introduce virtual ParseRegister method in TargetAsmParser.

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Create override of this method in X86/ARM/MBlaze.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124378 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Roman Divacky 2011-01-27 17:14:22 +00:00
parent 9afc527671
commit bf7553210a
4 changed files with 21 additions and 6 deletions
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2
include/llvm/Target/TargetAsmParser.h
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@ -42,6 +42,8 @@ public:
unsigned getAvailableFeatures() const { return AvailableFeatures; }
void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
/// ParseInstruction - Parse one assembly instruction.
///
/// The parser is positioned following the instruction name. The target

7
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -53,6 +53,7 @@ class ARMAsmParser : public TargetAsmParser {
bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
int TryParseRegister();
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
bool TryParseCoprocessorOperandName(SmallVectorImpl<MCParsedAsmOperand*>&);
bool TryParseRegisterWithWriteBack(SmallVectorImpl<MCParsedAsmOperand*> &);
bool ParseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &);
@ -549,6 +550,12 @@ static unsigned MatchRegisterName(StringRef Name);
/// }
bool ARMAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
RegNo = TryParseRegister();
return (RegNo == (unsigned)-1);
}
/// Try to parse a register name. The token must be an Identifier when called,
/// and if it is a register name the token is eaten and the register number is
/// returned. Otherwise return -1.

15
lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
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@ -41,11 +41,13 @@ class MBlazeAsmParser : public TargetAsmParser {
bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
MBlazeOperand *ParseRegister();
MBlazeOperand *ParseRegister(unsigned &RegNo);
MBlazeOperand *ParseImmediate();
MBlazeOperand *ParseFsl();
MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
bool ParseDirectiveWord(unsigned Size, SMLoc L);
bool MatchAndEmitInstruction(SMLoc IDLoc,
@ -384,14 +386,18 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
return Op;
}
MBlazeOperand *MBlazeAsmParser::ParseRegister() {
bool MBlazeAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
return (ParseRegister(RegNo) == 0);
}
MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) {
SMLoc S = Parser.getTok().getLoc();
SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
switch (getLexer().getKind()) {
default: return 0;
case AsmToken::Identifier:
unsigned RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
if (RegNo == 0)
return 0;
@ -452,7 +458,8 @@ ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
MBlazeOperand *Op;
// Attempt to parse the next token as a register name
Op = ParseRegister();
unsigned RegNo;
Op = ParseRegister(RegNo);
// Attempt to parse the next token as an FSL immediate
if (!Op)

3
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -44,8 +44,6 @@ private:
bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
X86Operand *ParseOperand();
X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
@ -71,6 +69,7 @@ public:
setAvailableFeatures(ComputeAvailableFeatures(
&TM.getSubtarget<X86Subtarget>()));
}
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands);