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Use PassManagerBase instead of FunctionPassManager for functions

Browse Source 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-03-11 22:29:46 +00:00
parent e846dd89c1
commit bfae83139d
25 changed files with 85 additions and 89 deletions
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6
include/llvm/CodeGen/FileWriters.h
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@ -18,13 +18,13 @@
namespace llvm { namespace llvm {
class FunctionPassManager; class PassManagerBase;
class MachineCodeEmitter; class MachineCodeEmitter;
class TargetMachine; class TargetMachine;
MachineCodeEmitter *AddELFWriter(FunctionPassManager &FPM, std::ostream &O, MachineCodeEmitter *AddELFWriter(PassManagerBase &FPM, std::ostream &O,
TargetMachine &TM); TargetMachine &TM);
MachineCodeEmitter *AddMachOWriter(FunctionPassManager &FPM, std::ostream &O, MachineCodeEmitter *AddMachOWriter(PassManagerBase &FPM, std::ostream &O,
TargetMachine &TM); TargetMachine &TM);
} // end llvm namespace } // end llvm namespace

1
include/llvm/Target/TargetJITInfo.h
View File

@ -23,7 +23,6 @@
namespace llvm { namespace llvm {
class Function; class Function;
class FunctionPassManager;
class MachineBasicBlock; class MachineBasicBlock;
class MachineCodeEmitter; class MachineCodeEmitter;
class MachineRelocation; class MachineRelocation;

26
include/llvm/Target/TargetMachine.h
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@ -30,7 +30,7 @@ class TargetFrameInfo;
class MachineCodeEmitter; class MachineCodeEmitter;
class TargetRegisterInfo; class TargetRegisterInfo;
class Module; class Module;
class FunctionPassManager; class PassManagerBase;
class PassManager; class PassManager;
class Pass; class Pass;
class TargetMachOWriterInfo; class TargetMachOWriterInfo;
@ -195,7 +195,7 @@ public:
/// This method should return FileModel::Error if emission of this file type /// This method should return FileModel::Error if emission of this file type
/// is not supported. /// is not supported.
/// ///
virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM, virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out, std::ostream &Out,
CodeGenFileType FileType, CodeGenFileType FileType,
bool Fast) { bool Fast) {
@ -206,7 +206,7 @@ public:
/// to be split up (e.g., to add an object writer pass), this method can be /// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary. /// used to finish up adding passes to emit the file, if necessary.
/// ///
virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM, virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE, bool Fast) { MachineCodeEmitter *MCE, bool Fast) {
return true; return true;
} }
@ -217,7 +217,7 @@ public:
/// of functions. This method returns true if machine code emission is /// of functions. This method returns true if machine code emission is
/// not supported. /// not supported.
/// ///
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE, bool Fast) { MachineCodeEmitter &MCE, bool Fast) {
return true; return true;
} }
@ -251,7 +251,7 @@ public:
/// LLVM retargetable code generator, invoking the methods below to get /// LLVM retargetable code generator, invoking the methods below to get
/// target-specific passes in standard locations. /// target-specific passes in standard locations.
/// ///
virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM, virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out, std::ostream &Out,
CodeGenFileType FileType, CodeGenFileType FileType,
bool Fast); bool Fast);
@ -260,7 +260,7 @@ public:
/// to be split up (e.g., to add an object writer pass), this method can be /// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary. /// used to finish up adding passes to emit the file, if necessary.
/// ///
virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM, virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE, bool Fast); MachineCodeEmitter *MCE, bool Fast);
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
@ -269,7 +269,7 @@ public:
/// of functions. This method returns true if machine code emission is /// of functions. This method returns true if machine code emission is
/// not supported. /// not supported.
/// ///
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE, bool Fast); MachineCodeEmitter &MCE, bool Fast);
/// Target-Independent Code Generator Pass Configuration Options. /// Target-Independent Code Generator Pass Configuration Options.
@ -277,7 +277,7 @@ public:
/// addInstSelector - This method should add any "last minute" LLVM->LLVM /// addInstSelector - This method should add any "last minute" LLVM->LLVM
/// passes, then install an instruction selector pass, which converts from /// passes, then install an instruction selector pass, which converts from
/// LLVM code to machine instructions. /// LLVM code to machine instructions.
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast) { virtual bool addInstSelector(PassManagerBase &PM, bool Fast) {
return true; return true;
} }
@ -285,14 +285,14 @@ public:
/// want to run passes after register allocation but before prolog-epilog /// want to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print /// insertion. This should return true if -print-machineinstrs should print
/// after these passes. /// after these passes.
virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast) { virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast) {
return false; return false;
} }
/// addPreEmitPass - This pass may be implemented by targets that want to run /// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return /// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes. /// true if -print-machineinstrs should print out the code after the passes.
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast) { virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast) {
return false; return false;
} }
@ -300,7 +300,7 @@ public:
/// addAssemblyEmitter - This pass should be overridden by the target to add /// addAssemblyEmitter - This pass should be overridden by the target to add
/// the asmprinter, if asm emission is supported. If this is not supported, /// the asmprinter, if asm emission is supported. If this is not supported,
/// 'true' should be returned. /// 'true' should be returned.
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
return true; return true;
} }
@ -308,7 +308,7 @@ public:
/// addCodeEmitter - This pass should be overridden by the target to add a /// addCodeEmitter - This pass should be overridden by the target to add a
/// code emitter, if supported. If this is not supported, 'true' should be /// code emitter, if supported. If this is not supported, 'true' should be
/// returned. If DumpAsm is true, the generated assembly is printed to cerr. /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm, virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, bool DumpAsm,
MachineCodeEmitter &MCE) { MachineCodeEmitter &MCE) {
return true; return true;
} }
@ -317,7 +317,7 @@ public:
/// a code emitter (without setting flags), if supported. If this is not /// a code emitter (without setting flags), if supported. If this is not
/// supported, 'true' should be returned. If DumpAsm is true, the generated /// supported, 'true' should be returned. If DumpAsm is true, the generated
/// assembly is printed to cerr. /// assembly is printed to cerr.
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
return true; return true;
} }

4
lib/CodeGen/ELFWriter.cpp
View File

@ -50,11 +50,11 @@ using namespace llvm;
char ELFWriter::ID = 0; char ELFWriter::ID = 0;
/// AddELFWriter - Concrete function to add the ELF writer to the function pass /// AddELFWriter - Concrete function to add the ELF writer to the function pass
/// manager. /// manager.
MachineCodeEmitter *llvm::AddELFWriter(FunctionPassManager &FPM, MachineCodeEmitter *llvm::AddELFWriter(PassManagerBase &PM,
std::ostream &O, std::ostream &O,
TargetMachine &TM) { TargetMachine &TM) {
ELFWriter *EW = new ELFWriter(O, TM); ELFWriter *EW = new ELFWriter(O, TM);
FPM.add(EW); PM.add(EW);
return &EW->getMachineCodeEmitter(); return &EW->getMachineCodeEmitter();
} }

6
lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -51,7 +51,7 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
cl::init(true)); cl::init(true));
FileModel::Model FileModel::Model
LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
std::ostream &Out, std::ostream &Out,
CodeGenFileType FileType, CodeGenFileType FileType,
bool Fast) { bool Fast) {
@ -158,7 +158,7 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
/// addPassesToEmitFileFinish - If the passes to emit the specified file had to /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
/// be split up (e.g., to add an object writer pass), this method can be used to /// be split up (e.g., to add an object writer pass), this method can be used to
/// finish up adding passes to emit the file, if necessary. /// finish up adding passes to emit the file, if necessary.
bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM, bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
MachineCodeEmitter *MCE, MachineCodeEmitter *MCE,
bool Fast) { bool Fast) {
if (MCE) if (MCE)
@ -178,7 +178,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
/// of functions. This method should returns true if machine code emission is /// of functions. This method should returns true if machine code emission is
/// not supported. /// not supported.
/// ///
bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
MachineCodeEmitter &MCE, MachineCodeEmitter &MCE,
bool Fast) { bool Fast) {
// Standard LLVM-Level Passes. // Standard LLVM-Level Passes.

4
lib/CodeGen/MachOWriter.cpp
View File

@ -43,11 +43,11 @@ using namespace llvm;
/// AddMachOWriter - Concrete function to add the Mach-O writer to the function /// AddMachOWriter - Concrete function to add the Mach-O writer to the function
/// pass manager. /// pass manager.
MachineCodeEmitter *llvm::AddMachOWriter(FunctionPassManager &FPM, MachineCodeEmitter *llvm::AddMachOWriter(PassManagerBase &PM,
std::ostream &O, std::ostream &O,
TargetMachine &TM) { TargetMachine &TM) {
MachOWriter *MOW = new MachOWriter(O, TM); MachOWriter *MOW = new MachOWriter(O, TM);
FPM.add(MOW); PM.add(MOW);
return &MOW->getMachineCodeEmitter(); return &MOW->getMachineCodeEmitter();
} }

10
lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -116,12 +116,12 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
// Pass Pipeline Configuration // Pass Pipeline Configuration
bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createARMISelDag(*this)); PM.add(createARMISelDag(*this));
return false; return false;
} }
bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// FIXME: temporarily disabling load / store optimization pass for Thumb mode. // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
if (!Fast && !DisableLdStOpti && !Subtarget.isThumb()) if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
PM.add(createARMLoadStoreOptimizationPass()); PM.add(createARMLoadStoreOptimizationPass());
@ -133,7 +133,7 @@ bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
return true; return true;
} }
bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
// Output assembly language. // Output assembly language.
PM.add(createARMCodePrinterPass(Out, *this)); PM.add(createARMCodePrinterPass(Out, *this));
@ -141,7 +141,7 @@ bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
} }
bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo! // FIXME: Move this to TargetJITInfo!
setRelocationModel(Reloc::Static); setRelocationModel(Reloc::Static);
@ -153,7 +153,7 @@ bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false; return false;
} }
bool ARMTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
// Machine code emitter pass for ARM. // Machine code emitter pass for ARM.
PM.add(createARMCodeEmitterPass(*this, MCE)); PM.add(createARMCodeEmitterPass(*this, MCE));

10
lib/Target/ARM/ARMTargetMachine.h
View File

@ -55,13 +55,13 @@ public:
virtual const TargetAsmInfo *createTargetAsmInfo() const; virtual const TargetAsmInfo *createTargetAsmInfo() const;
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
}; };

10
lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -70,29 +70,29 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration // Pass Pipeline Configuration
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool AlphaTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createAlphaISelDag(*this)); PM.add(createAlphaISelDag(*this));
return false; return false;
} }
bool AlphaTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer // Must run branch selection immediately preceding the asm printer
PM.add(createAlphaBranchSelectionPass()); PM.add(createAlphaBranchSelectionPass());
return false; return false;
} }
bool AlphaTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
PM.add(createAlphaLLRPPass(*this)); PM.add(createAlphaLLRPPass(*this));
PM.add(createAlphaCodePrinterPass(Out, *this)); PM.add(createAlphaCodePrinterPass(Out, *this));
return false; return false;
} }
bool AlphaTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE)); PM.add(createAlphaCodeEmitterPass(*this, MCE));
if (DumpAsm) if (DumpAsm)
PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this)); PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this));
return false; return false;
} }
bool AlphaTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
bool Fast, bool DumpAsm, bool Fast, bool DumpAsm,
MachineCodeEmitter &MCE) { MachineCodeEmitter &MCE) {
return addCodeEmitter(PM, Fast, DumpAsm, MCE); return addCodeEmitter(PM, Fast, DumpAsm, MCE);

10
lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -58,13 +58,13 @@ public:
static unsigned getModuleMatchQuality(const Module &M); static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
}; };

4
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -71,14 +71,14 @@ SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS)
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool bool
SPUTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast)
{ {
// Install an instruction selector. // Install an instruction selector.
PM.add(createSPUISelDag(*this)); PM.add(createSPUISelDag(*this));
return false; return false;
} }
bool SPUTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
PM.add(createSPUAsmPrinterPass(Out, *this)); PM.add(createSPUAsmPrinterPass(Out, *this));
return false; return false;

4
lib/Target/CellSPU/SPUTargetMachine.h
View File

@ -83,8 +83,8 @@ public:
} }
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
}; };

6
lib/Target/IA64/IA64TargetMachine.cpp
View File

@ -73,17 +73,17 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration // Pass Pipeline Configuration
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool IA64TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createIA64DAGToDAGInstructionSelector(*this)); PM.add(createIA64DAGToDAGInstructionSelector(*this));
return false; return false;
} }
bool IA64TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Make sure everything is bundled happily // Make sure everything is bundled happily
PM.add(createIA64BundlingPass(*this)); PM.add(createIA64BundlingPass(*this));
return true; return true;
} }
bool IA64TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
PM.add(createIA64CodePrinterPass(Out, *this)); PM.add(createIA64CodePrinterPass(Out, *this));
return false; return false;

6
lib/Target/IA64/IA64TargetMachine.h
View File

@ -48,9 +48,9 @@ public:
static unsigned getModuleMatchQuality(const Module &M); static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
}; };
} // End llvm namespace } // End llvm namespace

1
lib/Target/Mips/Mips.h
View File

@ -19,7 +19,6 @@
namespace llvm { namespace llvm {
class MipsTargetMachine; class MipsTargetMachine;
class FunctionPassManager;
class FunctionPass; class FunctionPass;
class MachineCodeEmitter; class MachineCodeEmitter;

6
lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -65,7 +65,7 @@ getModuleMatchQuality(const Module &M)
// Install an instruction selector pass using // Install an instruction selector pass using
// the ISelDag to gen Mips code. // the ISelDag to gen Mips code.
bool MipsTargetMachine:: bool MipsTargetMachine::
addInstSelector(FunctionPassManager &PM, bool Fast) addInstSelector(PassManagerBase &PM, bool Fast)
{ {
PM.add(createMipsISelDag(*this)); PM.add(createMipsISelDag(*this));
return false; return false;
@ -75,7 +75,7 @@ addInstSelector(FunctionPassManager &PM, bool Fast)
// machine code is emitted. return true if -print-machineinstrs should // machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes. // print out the code after the passes.
bool MipsTargetMachine:: bool MipsTargetMachine::
addPreEmitPass(FunctionPassManager &PM, bool Fast) addPreEmitPass(PassManagerBase &PM, bool Fast)
{ {
PM.add(createMipsDelaySlotFillerPass(*this)); PM.add(createMipsDelaySlotFillerPass(*this));
return true; return true;
@ -84,7 +84,7 @@ addPreEmitPass(FunctionPassManager &PM, bool Fast)
// Implements the AssemblyEmitter for the target. Must return // Implements the AssemblyEmitter for the target. Must return
// true if AssemblyEmitter is supported // true if AssemblyEmitter is supported
bool MipsTargetMachine:: bool MipsTargetMachine::
addAssemblyEmitter(FunctionPassManager &PM, bool Fast, addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) std::ostream &Out)
{ {
// Output assembly language. // Output assembly language.

6
lib/Target/Mips/MipsTargetMachine.h
View File

@ -55,9 +55,9 @@ namespace llvm {
static unsigned getModuleMatchQuality(const Module &M); static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
}; };
} // End llvm namespace } // End llvm namespace

1
lib/Target/PowerPC/PPC.h
View File

@ -23,7 +23,6 @@
namespace llvm { namespace llvm {
class PPCTargetMachine; class PPCTargetMachine;
class FunctionPassManager;
class FunctionPass; class FunctionPass;
class MachineCodeEmitter; class MachineCodeEmitter;

10
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -118,26 +118,26 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
// Pass Pipeline Configuration // Pass Pipeline Configuration
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector. // Install an instruction selector.
PM.add(createPPCISelDag(*this)); PM.add(createPPCISelDag(*this));
return false; return false;
} }
bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
// Must run branch selection immediately preceding the asm printer. // Must run branch selection immediately preceding the asm printer.
PM.add(createPPCBranchSelectionPass()); PM.add(createPPCBranchSelectionPass());
return false; return false;
} }
bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
PM.add(createPPCAsmPrinterPass(Out, *this)); PM.add(createPPCAsmPrinterPass(Out, *this));
return false; return false;
} }
bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
// FIXME: This should be moved to TargetJITInfo!! // FIXME: This should be moved to TargetJITInfo!!
@ -161,7 +161,7 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false; return false;
} }
bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
// Machine code emitter pass for PowerPC. // Machine code emitter pass for PowerPC.
PM.add(createPPCCodeEmitterPass(*this, MCE)); PM.add(createPPCCodeEmitterPass(*this, MCE));

10
lib/Target/PowerPC/PPCTargetMachine.h
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@ -65,13 +65,13 @@ public:
} }
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool getEnableTailMergeDefault() const; virtual bool getEnableTailMergeDefault() const;
}; };

6
lib/Target/Sparc/SparcTargetMachine.cpp
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@ -61,7 +61,7 @@ unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
#endif #endif
} }
bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
PM.add(createSparcISelDag(*this)); PM.add(createSparcISelDag(*this));
return false; return false;
} }
@ -69,13 +69,13 @@ bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
/// addPreEmitPass - This pass may be implemented by targets that want to run /// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return /// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes. /// true if -print-machineinstrs should print out the code after the passes.
bool SparcTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
PM.add(createSparcFPMoverPass(*this)); PM.add(createSparcFPMoverPass(*this));
PM.add(createSparcDelaySlotFillerPass(*this)); PM.add(createSparcDelaySlotFillerPass(*this));
return true; return true;
} }
bool SparcTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
// Output assembly language. // Output assembly language.
PM.add(createSparcCodePrinterPass(Out, *this)); PM.add(createSparcCodePrinterPass(Out, *this));

6
lib/Target/Sparc/SparcTargetMachine.h
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@ -46,9 +46,9 @@ public:
static unsigned getModuleMatchQuality(const Module &M); static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration // Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
}; };

1
lib/Target/X86/X86.h
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@ -20,7 +20,6 @@
namespace llvm { namespace llvm {
class X86TargetMachine; class X86TargetMachine;
class FunctionPassManager;
class FunctionPass; class FunctionPass;
class MachineCodeEmitter; class MachineCodeEmitter;

10
lib/Target/X86/X86TargetMachine.cpp
View File

@ -153,24 +153,24 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
// Pass Pipeline Configuration // Pass Pipeline Configuration
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) { bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector. // Install an instruction selector.
PM.add(createX86ISelDag(*this, Fast)); PM.add(createX86ISelDag(*this, Fast));
return false; return false;
} }
bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) { bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
PM.add(createX86FloatingPointStackifierPass()); PM.add(createX86FloatingPointStackifierPass());
return true; // -print-machineinstr should print after this. return true; // -print-machineinstr should print after this.
} }
bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out) { std::ostream &Out) {
PM.add(createX86CodePrinterPass(Out, *this)); PM.add(createX86CodePrinterPass(Out, *this));
return false; return false;
} }
bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo! // FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default) { if (DefRelocModel == Reloc::Default) {
@ -189,7 +189,7 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
return false; return false;
} }
bool X86TargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) { bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createX86CodeEmitterPass(*this, MCE)); PM.add(createX86CodeEmitterPass(*this, MCE));
if (DumpAsm) if (DumpAsm)

10
lib/Target/X86/X86TargetMachine.h
View File

@ -61,13 +61,13 @@ public:
static unsigned getJITMatchQuality(); static unsigned getJITMatchQuality();
// Set up the pass pipeline. // Set up the pass pipeline.
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
std::ostream &Out); std::ostream &Out);
virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE); bool DumpAsm, MachineCodeEmitter &MCE);
}; };