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Add a target hook to allow loads from constant pools to be rematerialized, and an
implementation for x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -298,6 +298,16 @@ public:
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return 0;
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}
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/// isOtherReMaterializableLoad - If the specified machine instruction is a
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/// direct load that is trivially rematerializable, not counting loads from
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/// stack slots, return true. If not, return false. This predicate must
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/// return false if the instruction has any side effects other than
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/// producing the value from the load, or if it requres any address
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/// registers that are not always available.
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virtual bool isOtherReMaterializableLoad(MachineInstr *MI) const {
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return false;
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}
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/// convertToThreeAddress - This method must be implemented by targets that
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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/// may be able to convert a two-address instruction into one or moretrue
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@ -336,12 +336,14 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// time we see a vreg.
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if (interval.empty()) {
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// Remember if the definition can be rematerialized. All load's from fixed
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// stack slots are re-materializable.
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// stack slots are re-materializable. The target may permit other loads to
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// be re-materialized as well.
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int FrameIdx = 0;
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if (vi.DefInst &&
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(tii_->isReMaterializable(vi.DefInst->getOpcode()) ||
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(tii_->isLoadFromStackSlot(vi.DefInst, FrameIdx) &&
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mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx))))
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mf_->getFrameInfo()->isFixedObjectIndex(FrameIdx)) ||
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tii_->isOtherReMaterializableLoad(vi.DefInst)))
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interval.remat = vi.DefInst;
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// Get the Idx of the defining instructions.
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@ -664,7 +664,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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// If this instruction is being rematerialized, just remove it!
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int FrameIdx;
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if ((TID->Flags & M_REMATERIALIZIBLE) ||
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TII->isLoadFromStackSlot(&MI, FrameIdx)) {
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TII->isLoadFromStackSlot(&MI, FrameIdx) ||
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TII->isOtherReMaterializableLoad(&MI)) {
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bool Remove = true;
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for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI.getOperand(i);
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@ -112,6 +112,31 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI,
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}
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bool X86InstrInfo::isOtherReMaterializableLoad(MachineInstr *MI) const {
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switch (MI->getOpcode()) {
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default: break;
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case X86::MOV8rm:
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case X86::MOV16rm:
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case X86::MOV16_rm:
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case X86::MOV32rm:
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case X86::MOV32_rm:
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case X86::MOV64rm:
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case X86::FpLD64m:
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case X86::MOVSSrm:
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case X86::MOVSDrm:
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case X86::MOVAPSrm:
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case X86::MOVAPDrm:
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case X86::MMX_MOVD64rm:
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case X86::MMX_MOVQ64rm:
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return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() &&
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MI->getOperand(3).isRegister() && MI->getOperand(4).isConstantPoolIndex() &&
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MI->getOperand(1).getReg() == 0 &&
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MI->getOperand(2).getImmedValue() == 1 &&
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MI->getOperand(3).getReg() == 0;
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}
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return false;
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}
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/// convertToThreeAddress - This method must be implemented by targets that
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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/// may be able to convert a two-address instruction into a true
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@ -239,6 +239,7 @@ public:
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unsigned& destReg) const;
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unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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bool isOtherReMaterializableLoad(MachineInstr *MI) const;
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/// convertToThreeAddress - This method must be implemented by targets that
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/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
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