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Fix ARM encoding of non-return LDM instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118732 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-10 23:18:49 +00:00
parent 866aa394ca
commit c1235e2a4e
2 changed files with 11 additions and 4 deletions
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2
lib/Target/ARM/ARMInstrFormats.td
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@ -943,7 +943,7 @@ class AXI4ld<dag oops, dag iops, IndexMode im, Format f, InstrItinClass itin,
bits<16> dsts;
bits<4> Rn;
let Inst{27-25} = 0b100;
let Inst{22} = 0; // S bit
let Inst{24-22} = 0b010;
let Inst{20} = 1; // L bit
let Inst{19-16} = Rn;
let Inst{15-0} = dsts;

13
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1186,7 +1186,6 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
"$Rn = $wb", []> {
bits<4> p;
let Inst{31-28} = p;
let Inst{24-23} = 0b01;
let Inst{21} = 1;
}
@ -1709,13 +1708,21 @@ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1,
def LDM : AXI4ld<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p,
reglist:$dsts, variable_ops),
IndexModeNone, LdStMulFrm, IIC_iLoad_m,
"ldm${amode}${p}\t$Rn, $dsts", "", []>;
"ldm${amode}${p}\t$Rn, $dsts", "", []> {
bits<4> p;
let Inst{31-28} = p;
let Inst{21} = 0;
}
def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p,
reglist:$dsts, variable_ops),
IndexModeUpd, LdStMulFrm, IIC_iLoad_mu,
"ldm${amode}${p}\t$Rn!, $dsts",
"$Rn = $wb", []>;
"$Rn = $wb", []> {
bits<4> p;
let Inst{31-28} = p;
let Inst{21} = 1;
}
} // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq
let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1,