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Tighten operand checking on memory barrier instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137176 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3814,6 +3814,7 @@ def MemBarrierOptOperand : AsmOperandClass {
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def memb_opt : Operand<i32> {
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let PrintMethod = "printMemBOption";
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let ParserMatchClass = MemBarrierOptOperand;
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let DecoderMethod = "DecodeMemBarrierOption";
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}
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// memory barriers protect the atomic sequences
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@ -131,6 +131,8 @@ static bool DecodeCoprocessor(llvm::MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static bool DecodeAddrMode3Offset(llvm::MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static bool DecodeMemBarrierOption(llvm::MCInst &Inst, unsigned Insn,
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uint64_t Address, const void *Decoder);
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static bool DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
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@ -2268,8 +2270,7 @@ static bool DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn,
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}
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unsigned imm = fieldFromInstruction32(Insn, 0, 4);
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Inst.addOperand(MCOperand::CreateImm(imm));
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return true;
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return DecodeMemBarrierOption(Inst, imm, Address, Decoder);
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}
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unsigned brtarget = fieldFromInstruction32(Insn, 0, 11) << 1;
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@ -2347,3 +2348,24 @@ static bool DecodeAddrMode3Offset(llvm::MCInst &Inst, unsigned Val,
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return true;
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}
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static bool DecodeMemBarrierOption(llvm::MCInst &Inst, unsigned Val,
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uint64_t Address, const void *Decoder) {
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switch (Val) {
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default:
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return false;
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case 0xF: // SY
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case 0xE: // ST
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case 0xB: // ISH
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case 0xA: // ISHST
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case 0x7: // NSH
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case 0x6: // NSHST
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case 0x3: // OSH
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case 0x2: // OSHST
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break;
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}
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Inst.addOperand(MCOperand::CreateImm(Val));
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return true;
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}
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@ -1,12 +1,11 @@
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# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
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# XFAIL: *
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# Opcode=1908 Name=t2DMB Format=ARM_FORMAT_THUMBFRM(25)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 0: 0: 1: 1| 1: 0: 1: 1| 1: 1: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 1: 0: 1| 0: 0: 0: 1|
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# -------------------------------------------------------------------------------------------------
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#
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#
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# Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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# Reject invalid encodings.
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#
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@ -1,12 +1,11 @@
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# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
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# XFAIL: *
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# Opcode=102 Name=DSB Format=ARM_FORMAT_MISCFRM(26)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 0: 1: 0: 1| 0: 1: 1: 1| 1: 1: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 0: 0| 0: 0: 0: 0|
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# -------------------------------------------------------------------------------------------------
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#
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#
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# Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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# Reject invalid encodings.
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#
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@ -1,12 +1,11 @@
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# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
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# XFAIL: *
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# Opcode=1894 Name=t2Bcc Format=ARM_FORMAT_THUMBFRM(25)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 0: 1: 1: 1| 1: 0: 1: 0| 1: 1: 1: 1| 1: 0: 0: 0| 1: 0: 1: 1| 0: 1: 0: 0| 0: 1: 0: 0|
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# -------------------------------------------------------------------------------------------------
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#
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#
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# A8.6.16 B
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# if cond<3:1> == '111' then SEE "Related Encodings"
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0xaf 0xf7 0x44 0x8b
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