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[X86][SSE] Regenerate PMUL tests
Tidied up triple and regenerate tests using update_llc_test_checks.py git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254029 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
f52f1369a2
commit
c3f9891ca7
@ -1,6 +1,7 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX2
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
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define <16 x i8> @mul8c(<16 x i8> %i) nounwind {
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; SSE2-LABEL: mul8c:
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@ -34,16 +35,34 @@ define <16 x i8> @mul8c(<16 x i8> %i) nounwind {
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; SSE41-NEXT: packuswb %xmm0, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX2-LABEL: mul8c:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
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; AVX2-NEXT: vpmovsxbw {{.*}}(%rip), %ymm1
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; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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entry:
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%A = mul <16 x i8> %i, < i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117, i8 117 >
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ret <16 x i8> %A
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}
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define <8 x i16> @mul16c(<8 x i16> %i) nounwind {
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; ALL-LABEL: mul16c:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: pmullw {{.*}}(%rip), %xmm0
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; ALL-NEXT: retq
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; SSE-LABEL: mul16c:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: mul16c:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <8 x i16> %i, < i16 117, i16 117, i16 117, i16 117, i16 117, i16 117, i16 117, i16 117 >
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ret <8 x i16> %A
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@ -65,22 +84,38 @@ define <4 x i32> @a(<4 x i32> %i) nounwind {
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0
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; SSE41-NEXT: retq
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;
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; AVX2-LABEL: a:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1
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; AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
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ret <4 x i32> %A
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}
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define <2 x i64> @b(<2 x i64> %i) nounwind {
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; ALL-LABEL: b:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: movdqa {{.*#+}} xmm1 = [117,117]
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: pmuludq %xmm1, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm1, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: retq
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; SSE-LABEL: b:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: movdqa {{.*#+}} xmm1 = [117,117]
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; SSE-NEXT: movdqa %xmm0, %xmm2
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; SSE-NEXT: pmuludq %xmm1, %xmm2
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; SSE-NEXT: psrlq $32, %xmm0
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; SSE-NEXT: pmuludq %xmm1, %xmm0
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; SSE-NEXT: psllq $32, %xmm0
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; SSE-NEXT: paddq %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: b:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [117,117]
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; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; AVX2-NEXT: vpsrlq $32, %xmm0, %xmm0
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; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
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; AVX2-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <2 x i64> %i, < i64 117, i64 117 >
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ret <2 x i64> %A
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@ -123,16 +158,34 @@ define <16 x i8> @mul8(<16 x i8> %i, <16 x i8> %j) nounwind {
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; SSE41-NEXT: packuswb %xmm0, %xmm2
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX2-LABEL: mul8:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmovsxbw %xmm1, %ymm1
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; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
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; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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entry:
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%A = mul <16 x i8> %i, %j
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ret <16 x i8> %A
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}
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define <8 x i16> @mul16(<8 x i16> %i, <8 x i16> %j) nounwind {
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; ALL-LABEL: mul16:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: pmullw %xmm1, %xmm0
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; ALL-NEXT: retq
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; SSE-LABEL: mul16:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: pmullw %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: mul16:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmullw %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <8 x i16> %i, %j
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ret <8 x i16> %A
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@ -154,26 +207,44 @@ define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
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; SSE41: # BB#0: # %entry
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; SSE41-NEXT: pmulld %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX2-LABEL: c:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
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; ALL-LABEL: d:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: pmuludq %xmm1, %xmm2
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; ALL-NEXT: movdqa %xmm1, %xmm3
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; ALL-NEXT: psrlq $32, %xmm3
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; ALL-NEXT: pmuludq %xmm0, %xmm3
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; ALL-NEXT: psllq $32, %xmm3
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; ALL-NEXT: paddq %xmm3, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm1, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: retq
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; SSE-LABEL: d:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: movdqa %xmm0, %xmm2
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; SSE-NEXT: pmuludq %xmm1, %xmm2
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; SSE-NEXT: movdqa %xmm1, %xmm3
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; SSE-NEXT: psrlq $32, %xmm3
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; SSE-NEXT: pmuludq %xmm0, %xmm3
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; SSE-NEXT: psllq $32, %xmm3
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; SSE-NEXT: paddq %xmm3, %xmm2
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; SSE-NEXT: psrlq $32, %xmm0
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; SSE-NEXT: pmuludq %xmm1, %xmm0
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; SSE-NEXT: psllq $32, %xmm0
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; SSE-NEXT: paddq %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: d:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
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; AVX2-NEXT: vpsrlq $32, %xmm1, %xmm3
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; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm3
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; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
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; AVX2-NEXT: vpaddq %xmm3, %xmm2, %xmm2
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; AVX2-NEXT: vpsrlq $32, %xmm0, %xmm0
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; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
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; AVX2-NEXT: vpaddq %xmm0, %xmm2, %xmm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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@ -210,6 +281,17 @@ define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
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; SSE41-NEXT: pmulld {{[0-9]+}}(%rsp), %xmm0 # 16-byte Folded Reload
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; SSE41-NEXT: addq $40, %rsp
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; SSE41-NEXT: retq
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;
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; AVX2-LABEL: e:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: subq $40, %rsp
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; AVX2-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
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; AVX2-NEXT: callq foo
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; AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
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; AVX2-NEXT: vpmulld {{[0-9]+}}(%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
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; AVX2-NEXT: addq $40, %rsp
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; AVX2-NEXT: retq
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entry:
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; Use a call to force spills.
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call void @foo()
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@ -218,27 +300,47 @@ entry:
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}
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define <2 x i64> @f(<2 x i64> %i, <2 x i64> %j) nounwind {
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; ALL-LABEL: f:
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; ALL: # BB#0: # %entry
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; ALL-NEXT: subq $40, %rsp
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; ALL-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; ALL-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; ALL-NEXT: callq foo
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; ALL-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
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; ALL-NEXT: movdqa %xmm0, %xmm2
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; ALL-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm3 # 16-byte Reload
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; ALL-NEXT: pmuludq %xmm3, %xmm2
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; ALL-NEXT: movdqa %xmm3, %xmm1
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; ALL-NEXT: psrlq $32, %xmm1
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; ALL-NEXT: pmuludq %xmm0, %xmm1
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; ALL-NEXT: psllq $32, %xmm1
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; ALL-NEXT: paddq %xmm1, %xmm2
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; ALL-NEXT: psrlq $32, %xmm0
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; ALL-NEXT: pmuludq %xmm3, %xmm0
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; ALL-NEXT: psllq $32, %xmm0
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; ALL-NEXT: paddq %xmm2, %xmm0
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; ALL-NEXT: addq $40, %rsp
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; ALL-NEXT: retq
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; SSE-LABEL: f:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: subq $40, %rsp
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; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; SSE-NEXT: callq foo
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; SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
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; SSE-NEXT: movdqa %xmm0, %xmm2
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm3 # 16-byte Reload
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; SSE-NEXT: pmuludq %xmm3, %xmm2
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; SSE-NEXT: movdqa %xmm3, %xmm1
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; SSE-NEXT: psrlq $32, %xmm1
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; SSE-NEXT: pmuludq %xmm0, %xmm1
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; SSE-NEXT: psllq $32, %xmm1
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; SSE-NEXT: paddq %xmm1, %xmm2
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; SSE-NEXT: psrlq $32, %xmm0
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; SSE-NEXT: pmuludq %xmm3, %xmm0
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; SSE-NEXT: psllq $32, %xmm0
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; SSE-NEXT: paddq %xmm2, %xmm0
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; SSE-NEXT: addq $40, %rsp
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: f:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: subq $40, %rsp
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; AVX2-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; AVX2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
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; AVX2-NEXT: callq foo
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; AVX2-NEXT: vmovdqa {{[0-9]+}}(%rsp), %xmm2 # 16-byte Reload
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; AVX2-NEXT: vmovdqa (%rsp), %xmm3 # 16-byte Reload
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; AVX2-NEXT: vpmuludq %xmm2, %xmm3, %xmm0
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; AVX2-NEXT: vpsrlq $32, %xmm2, %xmm1
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; AVX2-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
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; AVX2-NEXT: vpsllq $32, %xmm1, %xmm1
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; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpsrlq $32, %xmm3, %xmm1
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; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpsllq $32, %xmm1, %xmm1
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; AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: addq $40, %rsp
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; AVX2-NEXT: retq
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entry:
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; Use a call to force spills.
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call void @foo()
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@ -247,31 +349,76 @@ entry:
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}
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define <4 x i64> @b1(<4 x i64> %i) nounwind {
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; AVX2-LABEL: @b1
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; AVX2: vpbroadcastq
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsrlq $32
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; AVX2-NEXT: vpmuludq
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; AVX2-NEXT: vpsllq $32
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; AVX2-NEXT: vpaddq
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; AVX2-NEXT: retq
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; SSE-LABEL: b1:
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; SSE: # BB#0: # %entry
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; SSE-NEXT: movdqa {{.*#+}} xmm2 = [117,117]
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; SSE-NEXT: movdqa %xmm0, %xmm3
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; SSE-NEXT: pmuludq %xmm2, %xmm3
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; SSE-NEXT: psrlq $32, %xmm0
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; SSE-NEXT: pmuludq %xmm2, %xmm0
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; SSE-NEXT: psllq $32, %xmm0
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; SSE-NEXT: paddq %xmm3, %xmm0
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; SSE-NEXT: movdqa %xmm1, %xmm3
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; SSE-NEXT: pmuludq %xmm2, %xmm3
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; SSE-NEXT: psrlq $32, %xmm1
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; SSE-NEXT: pmuludq %xmm2, %xmm1
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; SSE-NEXT: psllq $32, %xmm1
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; SSE-NEXT: paddq %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX2-LABEL: b1:
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; AVX2: # BB#0: # %entry
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; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm1
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; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2
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; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0
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; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0
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; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0
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; AVX2-NEXT: retq
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entry:
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%A = mul <4 x i64> %i, < i64 117, i64 117, i64 117, i64 117 >
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ret <4 x i64> %A
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||||
}
|
||||
|
||||
define <4 x i64> @b2(<4 x i64> %i, <4 x i64> %j) nounwind {
|
||||
; AVX2-LABEL: @b2
|
||||
; AVX2: vpmuludq
|
||||
; AVX2-NEXT: vpsrlq $32
|
||||
; AVX2-NEXT: vpmuludq
|
||||
; AVX2-NEXT: vpsllq $32
|
||||
; AVX2-NEXT: vpaddq
|
||||
; AVX2-NEXT: vpsrlq $32
|
||||
; AVX2-NEXT: vpmuludq
|
||||
; AVX2-NEXT: vpsllq $32
|
||||
; AVX2-NEXT: vpaddq
|
||||
; AVX2-NEXT: retq
|
||||
; SSE-LABEL: b2:
|
||||
; SSE: # BB#0: # %entry
|
||||
; SSE-NEXT: movdqa %xmm0, %xmm4
|
||||
; SSE-NEXT: pmuludq %xmm2, %xmm4
|
||||
; SSE-NEXT: movdqa %xmm2, %xmm5
|
||||
; SSE-NEXT: psrlq $32, %xmm5
|
||||
; SSE-NEXT: pmuludq %xmm0, %xmm5
|
||||
; SSE-NEXT: psllq $32, %xmm5
|
||||
; SSE-NEXT: paddq %xmm5, %xmm4
|
||||
; SSE-NEXT: psrlq $32, %xmm0
|
||||
; SSE-NEXT: pmuludq %xmm2, %xmm0
|
||||
; SSE-NEXT: psllq $32, %xmm0
|
||||
; SSE-NEXT: paddq %xmm4, %xmm0
|
||||
; SSE-NEXT: movdqa %xmm1, %xmm2
|
||||
; SSE-NEXT: pmuludq %xmm3, %xmm2
|
||||
; SSE-NEXT: movdqa %xmm3, %xmm4
|
||||
; SSE-NEXT: psrlq $32, %xmm4
|
||||
; SSE-NEXT: pmuludq %xmm1, %xmm4
|
||||
; SSE-NEXT: psllq $32, %xmm4
|
||||
; SSE-NEXT: paddq %xmm4, %xmm2
|
||||
; SSE-NEXT: psrlq $32, %xmm1
|
||||
; SSE-NEXT: pmuludq %xmm3, %xmm1
|
||||
; SSE-NEXT: psllq $32, %xmm1
|
||||
; SSE-NEXT: paddq %xmm2, %xmm1
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: b2:
|
||||
; AVX2: # BB#0: # %entry
|
||||
; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2
|
||||
; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm3
|
||||
; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
|
||||
; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3
|
||||
; AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm2
|
||||
; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0
|
||||
; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
|
||||
; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0
|
||||
; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
entry:
|
||||
%A = mul <4 x i64> %i, %j
|
||||
ret <4 x i64> %A
|
||||
|
||||
Loading…
Reference in New Issue
Block a user