From c42cab96d73e1317d673fec417522971bb643f63 Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Wed, 23 Jul 2014 00:42:52 +0000 Subject: [PATCH] Trailing whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213711 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetIntrinsicInfo.h | 2 +- include/llvm/Target/TargetJITInfo.h | 1 - include/llvm/Target/TargetLibraryInfo.h | 4 ++-- include/llvm/Target/TargetSelectionDAGInfo.h | 2 +- include/llvm/Target/TargetSubtargetInfo.h | 8 ++++---- 5 files changed, 8 insertions(+), 9 deletions(-) diff --git a/include/llvm/Target/TargetIntrinsicInfo.h b/include/llvm/Target/TargetIntrinsicInfo.h index 6de264e90ef..71c0166d49b 100644 --- a/include/llvm/Target/TargetIntrinsicInfo.h +++ b/include/llvm/Target/TargetIntrinsicInfo.h @@ -52,7 +52,7 @@ public: /// Returns true if the intrinsic can be overloaded. virtual bool isOverloaded(unsigned IID) const = 0; - + /// Create or insert an LLVM Function declaration for an intrinsic, /// and return it. The Tys and numTys are for intrinsics with overloaded /// types. See above for more information. diff --git a/include/llvm/Target/TargetJITInfo.h b/include/llvm/Target/TargetJITInfo.h index f9bd0fb9f98..58acf30e034 100644 --- a/include/llvm/Target/TargetJITInfo.h +++ b/include/llvm/Target/TargetJITInfo.h @@ -104,7 +104,6 @@ namespace llvm { unsigned NumRelocs, unsigned char* GOTBase) { assert(NumRelocs == 0 && "This target does not have relocations!"); } - /// allocateThreadLocalMemory - Each target has its own way of /// handling thread local variables. This method returns a value only diff --git a/include/llvm/Target/TargetLibraryInfo.h b/include/llvm/Target/TargetLibraryInfo.h index d4f9f233059..389fd250daa 100644 --- a/include/llvm/Target/TargetLibraryInfo.h +++ b/include/llvm/Target/TargetLibraryInfo.h @@ -54,7 +54,7 @@ namespace llvm { cxa_atexit, /// void __cxa_guard_abort(guard_t *guard); /// guard_t is int64_t in Itanium ABI or int32_t on ARM eabi. - cxa_guard_abort, + cxa_guard_abort, /// int __cxa_guard_acquire(guard_t *guard); cxa_guard_acquire, /// void __cxa_guard_release(guard_t *guard); @@ -696,7 +696,7 @@ public: TargetLibraryInfo(); TargetLibraryInfo(const Triple &T); explicit TargetLibraryInfo(const TargetLibraryInfo &TLI); - + /// getLibFunc - Search for a particular function name. If it is one of the /// known library functions, return true and set F to the corresponding value. bool getLibFunc(StringRef funcName, LibFunc::Func &F) const; diff --git a/include/llvm/Target/TargetSelectionDAGInfo.h b/include/llvm/Target/TargetSelectionDAGInfo.h index 78a2db183fb..d1a3fcf4a50 100644 --- a/include/llvm/Target/TargetSelectionDAGInfo.h +++ b/include/llvm/Target/TargetSelectionDAGInfo.h @@ -46,7 +46,7 @@ public: /// more efficient than using a library call. This function can return a null /// SDValue if the target declines to use custom code and a different /// lowering strategy should be used. - /// + /// /// If AlwaysInline is true, the size is constant and the target should not /// emit any calls and is strongly encouraged to attempt to emit inline code /// even if it is beyond the usual threshold because this intrinsic is being diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h index 86e303e1834..2b270350fa2 100644 --- a/include/llvm/Target/TargetSubtargetInfo.h +++ b/include/llvm/Target/TargetSubtargetInfo.h @@ -90,26 +90,26 @@ public: // dependency. virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const { } - + // For use with PostRAScheduling: get the anti-dependence breaking that should // be performed before post-RA scheduling. virtual AntiDepBreakMode getAntiDepBreakMode() const { return ANTIDEP_NONE; } - + // For use with PostRAScheduling: in CriticalPathRCs, return any register // classes that should only be considered for anti-dependence breaking if they // are on the critical path. virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { return CriticalPathRCs.clear(); } - + // For use with PostRAScheduling: get the minimum optimization level needed // to enable post-RA scheduling. virtual CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const { return CodeGenOpt::Default; } - + /// \brief True if the subtarget should run the local reassignment /// heuristic of the register allocator. /// This heuristic may be compile time intensive, \p OptLevel provides