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We can't return SSE/MMX vectors if SSE is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114745 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1315,9 +1315,11 @@ X86TargetLowering::LowerReturn(SDValue Chain,
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SDValue ValToCopy = OutVals[i];
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SDValue ValToCopy = OutVals[i];
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EVT ValVT = ValToCopy.getValueType();
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EVT ValVT = ValToCopy.getValueType();
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// If this is x86-64, and we disabled SSE, we can't return FP values
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// If this is x86-64, and we disabled SSE, we can't return FP values,
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if ((ValVT == MVT::f32 || ValVT == MVT::f64) &&
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// or SSE or MMX vectors.
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(Subtarget->is64Bit() && !Subtarget->hasSSE1())) {
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if ((ValVT == MVT::f32 || ValVT == MVT::f64 ||
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VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
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(Subtarget->is64Bit() && !Subtarget->hasSSE1())) {
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report_fatal_error("SSE register return with SSE disabled");
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report_fatal_error("SSE register return with SSE disabled");
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}
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}
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// Likewise we can't return F64 values with SSE1 only. gcc does so, but
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// Likewise we can't return F64 values with SSE1 only. gcc does so, but
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