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Add comment about the pseudo registers QQ, each of which is a pair of Q registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103731 91177308-0d34-0410-b5e6-96231b3b80d8
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Evan Cheng 2010-05-13 20:02:08 +00:00
parent 1190c14b54
commit c4ca40eb5e
1 changed files with 5 additions and 0 deletions
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5
lib/Target/ARM/ARMRegisterInfo.td
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@ -108,6 +108,11 @@ def Q15 : ARMReg<15, "q15", [D30, D31]>;
// Pseudo 256-bit registers to represent pairs of Q registers. These should
// never be present in the emitted code.
// These are used for NEON load / store instructions, e.g. vld4, vst3.
// NOTE: It's possible to define more QQ registers since technical the
// starting D register number doesn't have to be multiple of 4. e.g.
// D1, D2, D3, D4 would be a legal quad. But that would make the sub-register
// stuffs very messy.
def QQ0 : ARMReg<0, "qq0", [Q0, Q1]>;
def QQ1 : ARMReg<1, "qq1", [Q2, Q3]>;
def QQ2 : ARMReg<2, "qq2", [Q4, Q5]>;