RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-16 00:17:32 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Make static variables const if possible. Makes them go into a read-only section.

Browse Source 
Or fold them into a initializer list which has the same effect. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231598 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-03-08 16:07:39 +00:00
parent b8056be62c
commit c8a95a8bf4
7 changed files with 35 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/Analysis/TargetLibraryInfo.h
View File

@ -40,7 +40,7 @@ class TargetLibraryInfoImpl {
unsigned char AvailableArray[(LibFunc::NumLibFuncs+3)/4];
llvm::DenseMap<unsigned, std::string> CustomNames;
static const char* StandardNames[LibFunc::NumLibFuncs];
static const char *const StandardNames[LibFunc::NumLibFuncs];
enum AvailabilityState {
StandardName = 3, // (memset to all ones)

8
lib/Analysis/Lint.cpp
View File

@ -59,10 +59,10 @@ using namespace llvm;
namespace {
namespace MemRef {
static unsigned Read = 1;
static unsigned Write = 2;
static unsigned Callee = 4;
static unsigned Branchee = 8;
static const unsigned Read = 1;
static const unsigned Write = 2;
static const unsigned Callee = 4;
static const unsigned Branchee = 8;
}
class Lint : public FunctionPass, public InstVisitor<Lint> {

13
lib/Analysis/TargetLibraryInfo.cpp
View File

@ -15,11 +15,10 @@
#include "llvm/ADT/Triple.h"
using namespace llvm;
const char* TargetLibraryInfoImpl::StandardNames[LibFunc::NumLibFuncs] =
{
const char *const TargetLibraryInfoImpl::StandardNames[LibFunc::NumLibFuncs] = {
#define TLI_DEFINE_STRING
#include "llvm/Analysis/TargetLibraryInfo.def"
};
};
static bool hasSinCosPiStret(const Triple &T) {
// Only Darwin variants have _stret versions of combined trig functions.
@ -43,7 +42,7 @@ static bool hasSinCosPiStret(const Triple &T) {
/// specified target triple. This should be carefully written so that a missing
/// target triple gets a sane set of defaults.
static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
const char **StandardNames) {
const char *const *StandardNames) {
#ifndef NDEBUG
// Verify that the StandardNames array is in alphabetical order.
for (unsigned F = 1; F < LibFunc::NumLibFuncs; ++F) {
@ -401,14 +400,14 @@ static StringRef sanitizeFunctionName(StringRef funcName) {
bool TargetLibraryInfoImpl::getLibFunc(StringRef funcName,
LibFunc::Func &F) const {
const char **Start = &StandardNames[0];
const char **End = &StandardNames[LibFunc::NumLibFuncs];
const char *const *Start = &StandardNames[0];
const char *const *End = &StandardNames[LibFunc::NumLibFuncs];
funcName = sanitizeFunctionName(funcName);
if (funcName.empty())
return false;
const char **I = std::lower_bound(
const char *const *I = std::lower_bound(
Start, End, funcName, [](const char *LHS, StringRef RHS) {
return std::strncmp(LHS, RHS.data(), RHS.size()) < 0;
});

3
lib/CodeGen/InterferenceCache.cpp
View File

@ -21,7 +21,8 @@ using namespace llvm;
#define DEBUG_TYPE "regalloc"
// Static member used for null interference cursors.
InterferenceCache::BlockInterference InterferenceCache::Cursor::NoInterference;
const InterferenceCache::BlockInterference
InterferenceCache::Cursor::NoInterference;
// Initializes PhysRegEntries (instead of a SmallVector, PhysRegEntries is a
// buffer of size NumPhysRegs to speed up alloc/clear for targets with large

4
lib/CodeGen/InterferenceCache.h
View File

@ -170,8 +170,8 @@ public:
/// Cursor - The primary query interface for the block interference cache.
class Cursor {
Entry *CacheEntry;
BlockInterference *Current;
static BlockInterference NoInterference;
const BlockInterference *Current;
static const BlockInterference NoInterference;
void setEntry(Entry *E) {
Current = nullptr;

8
lib/Target/AArch64/AArch64ISelLowering.cpp
View File

@ -370,9 +370,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
setOperationAction(ISD::FLOG10, MVT::v8f16, Expand);
// AArch64 has implementations of a lot of rounding-like FP operations.
static MVT RoundingTypes[] = { MVT::f32, MVT::f64};
for (unsigned I = 0; I < array_lengthof(RoundingTypes); ++I) {
MVT Ty = RoundingTypes[I];
for (MVT Ty : {MVT::f32, MVT::f64}) {
setOperationAction(ISD::FFLOOR, Ty, Legal);
setOperationAction(ISD::FNEARBYINT, Ty, Legal);
setOperationAction(ISD::FCEIL, Ty, Legal);
@ -569,9 +567,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
}
// AArch64 has implementations of a lot of rounding-like FP operations.
static MVT RoundingVecTypes[] = {MVT::v2f32, MVT::v4f32, MVT::v2f64 };
for (unsigned I = 0; I < array_lengthof(RoundingVecTypes); ++I) {
MVT Ty = RoundingVecTypes[I];
for (MVT Ty : {MVT::v2f32, MVT::v4f32, MVT::v2f64}) {
setOperationAction(ISD::FFLOOR, Ty, Legal);
setOperationAction(ISD::FNEARBYINT, Ty, Legal);
setOperationAction(ISD::FCEIL, Ty, Legal);

47
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -752,58 +752,47 @@ public:
}
bool isMovZSymbolG3() const {
static AArch64MCExpr::VariantKind Variants[] = { AArch64MCExpr::VK_ABS_G3 };
return isMovWSymbol(Variants);
return isMovWSymbol(AArch64MCExpr::VK_ABS_G3);
}
bool isMovZSymbolG2() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S,
AArch64MCExpr::VK_TPREL_G2, AArch64MCExpr::VK_DTPREL_G2};
return isMovWSymbol(Variants);
return isMovWSymbol({AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S,
AArch64MCExpr::VK_TPREL_G2,
AArch64MCExpr::VK_DTPREL_G2});
}
bool isMovZSymbolG1() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S,
return isMovWSymbol({
AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S,
AArch64MCExpr::VK_GOTTPREL_G1, AArch64MCExpr::VK_TPREL_G1,
AArch64MCExpr::VK_DTPREL_G1,
};
return isMovWSymbol(Variants);
});
}
bool isMovZSymbolG0() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S,
AArch64MCExpr::VK_TPREL_G0, AArch64MCExpr::VK_DTPREL_G0};
return isMovWSymbol(Variants);
return isMovWSymbol({AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S,
AArch64MCExpr::VK_TPREL_G0,
AArch64MCExpr::VK_DTPREL_G0});
}
bool isMovKSymbolG3() const {
static AArch64MCExpr::VariantKind Variants[] = { AArch64MCExpr::VK_ABS_G3 };
return isMovWSymbol(Variants);
return isMovWSymbol(AArch64MCExpr::VK_ABS_G3);
}
bool isMovKSymbolG2() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G2_NC};
return isMovWSymbol(Variants);
return isMovWSymbol(AArch64MCExpr::VK_ABS_G2_NC);
}
bool isMovKSymbolG1() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G1_NC, AArch64MCExpr::VK_TPREL_G1_NC,
AArch64MCExpr::VK_DTPREL_G1_NC
};
return isMovWSymbol(Variants);
return isMovWSymbol({AArch64MCExpr::VK_ABS_G1_NC,
AArch64MCExpr::VK_TPREL_G1_NC,
AArch64MCExpr::VK_DTPREL_G1_NC});
}
bool isMovKSymbolG0() const {
static AArch64MCExpr::VariantKind Variants[] = {
AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC,
AArch64MCExpr::VK_TPREL_G0_NC, AArch64MCExpr::VK_DTPREL_G0_NC
};
return isMovWSymbol(Variants);
return isMovWSymbol(
{AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC,
AArch64MCExpr::VK_TPREL_G0_NC, AArch64MCExpr::VK_DTPREL_G0_NC});
}
template<int RegWidth, int Shift>