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[X86] Make sure we don't read too many operands from X86ISD::FMADDS1/FMADDS3 nodes when doing FNEG combine.

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r317453 added new ISD nodes without rounding modes that were added to an existing if/else chain. But all the previous nodes handled there included a rounding mode. The final code after this if/else chain expected an extra operand that isn't present for the new nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317748 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2017-11-09 01:06:47 +00:00
parent a162211813
commit c8d83c1c39
2 changed files with 27 additions and 2 deletions
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7
lib/Target/X86/X86ISelLowering.cpp
View File

@ -35565,8 +35565,11 @@ static SDValue combineFMA(SDNode *N, SelectionDAG &DAG,
// Only return the node is the opcode was changed or one of the
// operand was negated. If not, we'll just recreate the same node.
if (HasNeg || NewOpcode != N->getOpcode())
return DAG.getNode(NewOpcode, dl, VT, A, B, C, N->getOperand(3));
if (HasNeg || NewOpcode != N->getOpcode()) {
if (N->getNumOperands() == 4)
return DAG.getNode(NewOpcode, dl, VT, A, B, C, N->getOperand(3));
return DAG.getNode(NewOpcode, dl, VT, A, B, C);
}
return SDValue();
}

22
test/CodeGen/X86/fma-fneg-combine.ll
View File

@ -160,6 +160,28 @@ entry:
declare <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
define <4 x float> @test11b(<4 x float> %a, <4 x float> %b, <4 x float> %c, i8 zeroext %mask) local_unnamed_addr #0 {
; SKX-LABEL: test11b:
; SKX: # BB#0: # %entry
; SKX-NEXT: kmovd %edi, %k1
; SKX-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm1 {%k1}
; SKX-NEXT: vmovaps %xmm1, %xmm0
; SKX-NEXT: retq
;
; KNL-LABEL: test11b:
; KNL: # BB#0: # %entry
; KNL-NEXT: kmovw %edi, %k1
; KNL-NEXT: vfmsub213ss %xmm2, %xmm1, %xmm1 {%k1}
; KNL-NEXT: vmovaps %xmm1, %xmm0
; KNL-NEXT: retq
entry:
%sub.i = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %c
%0 = tail call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %b, <4 x float> %b, <4 x float> %sub.i, i8 %mask, i32 4) #10
ret <4 x float> %0
}
declare <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
define <8 x double> @test12(<8 x double> %a, <8 x double> %b, <8 x double> %c, i8 %mask) {
; SKX-LABEL: test12:
; SKX: # BB#0: # %entry