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Add support for promoted registers being live across blocks.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-16 02:23:07 +00:00
parent 6a8b5183be
commit c8ea3c4710
1 changed files with 22 additions and 1 deletions
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23
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -257,7 +257,20 @@ public:
std::map<const Value*, unsigned>::const_iterator VMI =
FuncInfo.ValueMap.find(V);
assert(VMI != FuncInfo.ValueMap.end() && "Value not in map!");
return N = DAG.getCopyFromReg(VMI->second, VT, DAG.getEntryNode());
MVT::ValueType RegVT = VT;
if (TLI.getTypeAction(VT) == 1) // Must promote this value?
RegVT = TLI.getTypeToTransformTo(VT);
N = DAG.getCopyFromReg(VMI->second, RegVT, DAG.getEntryNode());
if (RegVT != VT)
if (MVT::isFloatingPoint(VT))
N = DAG.getNode(ISD::FP_ROUND, VT, N);
else
N = DAG.getNode(ISD::TRUNCATE, VT, N);
return N;
}
const SDOperand &setValue(const Value *V, SDOperand NewN) {
@ -777,6 +790,14 @@ CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
assert((Op.getOpcode() != ISD::CopyFromReg ||
cast<RegSDNode>(Op)->getReg() != Reg) &&
"Copy from a reg to the same reg!");
MVT::ValueType VT = Op.getValueType();
if (TLI.getTypeAction(VT) == 1) { // Must promote this value?
if (MVT::isFloatingPoint(VT))
Op = DAG.getNode(ISD::FP_EXTEND, TLI.getTypeToTransformTo(VT), Op);
else
Op = DAG.getNode(ISD::ZERO_EXTEND, TLI.getTypeToTransformTo(VT), Op);
}
return DAG.getCopyToReg(DAG.getRoot(), Op, Reg);
}