mirror of
https://github.com/RPCS3/llvm.git
synced 2025-03-04 08:37:45 +00:00
[X86] Remove unnecessary COPY_TO_REGCLASS(VR128) from the output patterns for FMA instrinsics.
The instructions are already defined as writing a VR128 register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312308 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
fe70e7d53a
commit
c945ee63fe
@ -244,12 +244,12 @@ multiclass fma3s<bits<8> opc132, bits<8> opc213, bits<8> opc231,
|
||||
// operand, not the second.
|
||||
let Predicates = [HasFMA] in {
|
||||
def : Pat<(IntF32 VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(COPY_TO_REGCLASS(!cast<Instruction>(NAME#"213SSr_Int")
|
||||
$src1, $src2, $src3), VR128)>;
|
||||
(!cast<Instruction>(NAME#"213SSr_Int")
|
||||
VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
|
||||
def : Pat<(IntF64 VR128:$src1, VR128:$src2, VR128:$src3),
|
||||
(COPY_TO_REGCLASS(!cast<Instruction>(NAME#"213SDr_Int")
|
||||
$src1, $src2, $src3), VR128)>;
|
||||
(!cast<Instruction>(NAME#"213SDr_Int")
|
||||
VR128:$src1, VR128:$src2, VR128:$src3)>;
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user