diff --git a/test/CodeGen/X86/and-encoding.ll b/test/CodeGen/X86/and-encoding.ll index 7bd28b57911..5acac5be3d1 100644 --- a/test/CodeGen/X86/and-encoding.ll +++ b/test/CodeGen/X86/and-encoding.ll @@ -1,14 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=x86_64-unknown-unknown -show-mc-encoding < %s | FileCheck %s -; Test that the direct object emission selects the and variant with 8 bit +; Test that the direct object emission selects the 'and' variant with 8-bit ; immediate. ; We used to get this wrong when using direct object emission, but not when ; reading assembly. - -target triple = "x86_64-pc-linux" - define void @f1() nounwind { ; CHECK-LABEL: f1: ; CHECK: # %bb.0: @@ -44,3 +41,83 @@ define void @f3(i32 %x, i1 *%y) nounwind { ret void } +; The immediate (0x0ffffff0) can be made into an i8 by making it negative. + +define i32 @lopped32_32to8(i32 %x) { +; CHECK-LABEL: lopped32_32to8: +; CHECK: # %bb.0: +; CHECK-NEXT: shrl $4, %edi # encoding: [0xc1,0xef,0x04] +; CHECK-NEXT: andl $268435440, %edi # encoding: [0x81,0xe7,0xf0,0xff,0xff,0x0f] +; CHECK-NEXT: # imm = 0xFFFFFF0 +; CHECK-NEXT: movl %edi, %eax # encoding: [0x89,0xf8] +; CHECK-NEXT: retq # encoding: [0xc3] + %shr = lshr i32 %x, 4 + %and = and i32 %shr, 268435440 + ret i32 %and +} + +; The immediate (0x0ffffff0) can be made into an i8 by making it negative. + +define i64 @lopped64_32to8(i64 %x) { +; CHECK-LABEL: lopped64_32to8: +; CHECK: # %bb.0: +; CHECK-NEXT: shrq $36, %rdi # encoding: [0x48,0xc1,0xef,0x24] +; CHECK-NEXT: andl $268435440, %edi # encoding: [0x81,0xe7,0xf0,0xff,0xff,0x0f] +; CHECK-NEXT: # imm = 0xFFFFFF0 +; CHECK-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8] +; CHECK-NEXT: retq # encoding: [0xc3] + %shr = lshr i64 %x, 36 + %and = and i64 %shr, 268435440 + ret i64 %and +} + +; The immediate (0x0ffffffffffffff0) can be made into an i8 by making it negative. + +define i64 @lopped64_64to8(i64 %x) { +; CHECK-LABEL: lopped64_64to8: +; CHECK: # %bb.0: +; CHECK-NEXT: shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04] +; CHECK-NEXT: movabsq $1152921504606846960, %rax # encoding: [0x48,0xb8,0xf0,0xff,0xff,0xff,0xff,0xff,0xff,0x0f] +; CHECK-NEXT: # imm = 0xFFFFFFFFFFFFFF0 +; CHECK-NEXT: andq %rdi, %rax # encoding: [0x48,0x21,0xf8] +; CHECK-NEXT: retq # encoding: [0xc3] + %shr = lshr i64 %x, 4 + %and = and i64 %shr, 1152921504606846960 + ret i64 %and +} + +; The immediate (0x0ffffffffff0fff0) can be made into an i32 by making it negative. + +define i64 @lopped64_64to32(i64 %x) { +; CHECK-LABEL: lopped64_64to32: +; CHECK: # %bb.0: +; CHECK-NEXT: shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04] +; CHECK-NEXT: movabsq $1152921504605863920, %rax # encoding: [0x48,0xb8,0xf0,0xff,0xf0,0xff,0xff,0xff,0xff,0x0f] +; CHECK-NEXT: # imm = 0xFFFFFFFFFF0FFF0 +; CHECK-NEXT: andq %rdi, %rax # encoding: [0x48,0x21,0xf8] +; CHECK-NEXT: retq # encoding: [0xc3] + %shr = lshr i64 %x, 4 + %and = and i64 %shr, 1152921504605863920 + ret i64 %and +} + +; The transform is not limited to shifts - computeKnownBits() knows the top 4 bits +; must be cleared, so 0x0fffff80 can become 0x80 sign-extended. + +define i32 @shrinkAndKnownBits(i32 %x) { +; CHECK-LABEL: shrinkAndKnownBits: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edi, %ecx # encoding: [0x89,0xf9] +; CHECK-NEXT: movl $4042322161, %eax # encoding: [0xb8,0xf1,0xf0,0xf0,0xf0] +; CHECK-NEXT: # imm = 0xF0F0F0F1 +; CHECK-NEXT: imulq %rcx, %rax # encoding: [0x48,0x0f,0xaf,0xc1] +; CHECK-NEXT: shrq $36, %rax # encoding: [0x48,0xc1,0xe8,0x24] +; CHECK-NEXT: andl $268435328, %eax # encoding: [0x25,0x80,0xff,0xff,0x0f] +; CHECK-NEXT: # imm = 0xFFFFF80 +; CHECK-NEXT: # kill: def %eax killed %eax killed %rax +; CHECK-NEXT: retq # encoding: [0xc3] + %div = udiv i32 %x, 17 + %and = and i32 %div, 268435328 + ret i32 %and +} +