From cbd88adea66261a2f4372906fe1e08c2093d8718 Mon Sep 17 00:00:00 2001
From: Nate Begeman <natebegeman@mac.com>
Date: Sun, 1 Mar 2009 23:44:07 +0000
Subject: [PATCH] Fix a problem with DAGCombine on 64b targets where folding
 extracts + build_vector into a shuffle would fail, because the type of the
 new build_vector would not be legal.  Try harder to create a legal
 build_vector type.  Note: this will be totally irrelevant once vector_shuffle
 no longer takes a build_vector for shuffle mask.

New:
_foo:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	subps	%xmm1, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0

Old:
_foo:
	xorps	%xmm0, %xmm0
	movss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	unpcklps	%xmm1, %xmm2
	pshufd	$80, %xmm1, %xmm1
	unpcklps	%xmm1, %xmm2
	pslldq	$16, %xmm2
	pshufd	$57, %xmm2, %xmm1
	subps	%xmm0, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp |  3 ++-
 test/CodeGen/X86/extract-combine.ll      | 15 +++++++++++++++
 2 files changed, 17 insertions(+), 1 deletion(-)
 create mode 100644 test/CodeGen/X86/extract-combine.ll

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4b3935c2173..788ffb6ad01 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5257,7 +5257,8 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
     }
 
     // Add count and size info.
-    MVT BuildVecVT = MVT::getVectorVT(TLI.getPointerTy(), NumElts);
+    MVT IndexVT = MVT::getIntegerVT(EltType.getSizeInBits());
+    MVT BuildVecVT = MVT::getVectorVT(IndexVT, NumElts);
     if (!TLI.isTypeLegal(BuildVecVT) && LegalTypes)
       return SDValue();
 
diff --git a/test/CodeGen/X86/extract-combine.ll b/test/CodeGen/X86/extract-combine.ll
new file mode 100644
index 00000000000..9172dced055
--- /dev/null
+++ b/test/CodeGen/X86/extract-combine.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=core2 -o %t -f
+; RUN: not grep unpcklps %t
+
+define i32 @foo() nounwind {
+entry:
+	%tmp74.i25762 = shufflevector <16 x float> zeroinitializer, <16 x float> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>		; <<16 x float>> [#uses=1]
+	%tmp518 = shufflevector <16 x float> %tmp74.i25762, <16 x float> undef, <4 x i32> <i32 12, i32 13, i32 14, i32 15>		; <<4 x float>> [#uses=1]
+	%movss.i25611 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp518, <4 x i32> <i32 4, i32 1, i32 2, i32 3>		; <<4 x float>> [#uses=1]
+	%conv3.i25615 = shufflevector <4 x float> %movss.i25611, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>		; <<4 x float>> [#uses=1]
+	%sub.i25620 = sub <4 x float> %conv3.i25615, zeroinitializer		; <<4 x float>> [#uses=1]
+	%mul.i25621 = mul <4 x float> zeroinitializer, %sub.i25620		; <<4 x float>> [#uses=1]
+	%add.i25622 = add <4 x float> zeroinitializer, %mul.i25621		; <<4 x float>> [#uses=1]
+	store <4 x float> %add.i25622, <4 x float>* null
+	unreachable
+}