diff --git a/test/Transforms/InstCombine/apint-add.ll b/test/Transforms/InstCombine/apint-add.ll index 6740ae66aef..f5b5bcb9d10 100644 --- a/test/Transforms/InstCombine/apint-add.ll +++ b/test/Transforms/InstCombine/apint-add.ll @@ -54,6 +54,32 @@ define i49 @test4(i49 %x) { ret i49 %tmp.4 } +define i7 @sext(i4 %x) { +; CHECK-LABEL: @sext( +; CHECK-NEXT: [[XOR:%.*]] = xor i4 %x, -8 +; CHECK-NEXT: [[ZEXT:%.*]] = zext i4 [[XOR]] to i7 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i7 [[ZEXT]], -8 +; CHECK-NEXT: ret i7 [[ADD]] +; + %xor = xor i4 %x, -8 + %zext = zext i4 %xor to i7 + %add = add nsw i7 %zext, -8 + ret i7 %add +} + +define <2 x i10> @sext_vec(<2 x i3> %x) { +; CHECK-LABEL: @sext_vec( +; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i3> %x, +; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i3> [[XOR]] to <2 x i10> +; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i10> [[ZEXT]], +; CHECK-NEXT: ret <2 x i10> [[ADD]] +; + %xor = xor <2 x i3> %x, + %zext = zext <2 x i3> %xor to <2 x i10> + %add = add nsw <2 x i10> %zext, + ret <2 x i10> %add +} + ; Tests for Integer BitWidth > 64 && BitWidth <= 1024. ;; Flip sign bit then add INT_MIN -> nop.