mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-15 07:59:57 +00:00
[WebAssembly] Support signext, zeroext, and several other function attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253148 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
6d9e0cc0e7
commit
ccb28273c8
@ -309,8 +309,6 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
|
||||
Chain = Res.getValue(1);
|
||||
}
|
||||
|
||||
// FIXME: handle CLI.RetSExt and CLI.RetZExt?
|
||||
|
||||
Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
|
||||
|
||||
return Chain;
|
||||
@ -342,22 +340,12 @@ SDValue WebAssemblyTargetLowering::LowerReturn(
|
||||
|
||||
// Record the number and types of the return values.
|
||||
for (const ISD::OutputArg &Out : Outs) {
|
||||
if (Out.Flags.isZExt())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented zext results");
|
||||
if (Out.Flags.isSExt())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented sext results");
|
||||
if (Out.Flags.isInReg())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented inreg results");
|
||||
if (Out.Flags.isSRet())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented sret results");
|
||||
if (Out.Flags.isByVal())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented byval results");
|
||||
if (Out.Flags.isInAlloca())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented inalloca results");
|
||||
if (Out.Flags.isNest())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented nest results");
|
||||
if (Out.Flags.isReturned())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented returned results");
|
||||
if (Out.Flags.isInConsecutiveRegs())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented cons regs results");
|
||||
if (Out.Flags.isInConsecutiveRegsLast())
|
||||
@ -383,22 +371,12 @@ SDValue WebAssemblyTargetLowering::LowerFormalArguments(
|
||||
|
||||
unsigned ArgNo = 0;
|
||||
for (const ISD::InputArg &In : Ins) {
|
||||
if (In.Flags.isZExt())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
|
||||
if (In.Flags.isSExt())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
|
||||
if (In.Flags.isInReg())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
|
||||
if (In.Flags.isSRet())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
|
||||
if (In.Flags.isByVal())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
|
||||
if (In.Flags.isInAlloca())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
|
||||
if (In.Flags.isNest())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
|
||||
if (In.Flags.isReturned())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
|
||||
if (In.Flags.isInConsecutiveRegs())
|
||||
fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
|
||||
if (In.Flags.isInConsecutiveRegsLast())
|
||||
|
76
test/CodeGen/WebAssembly/signext-zeroext.ll
Normal file
76
test/CodeGen/WebAssembly/signext-zeroext.ll
Normal file
@ -0,0 +1,76 @@
|
||||
; RUN: llc < %s -asm-verbose=false | FileCheck %s
|
||||
|
||||
; Test zeroext and signext ABI keywords
|
||||
|
||||
target datalayout = "e-p:32:32-i64:64-n32:64-S128"
|
||||
target triple = "wasm32-unknown-unknown"
|
||||
|
||||
; CHECK-LABEL: z2s_func:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i32{{$}}
|
||||
; CHECK-NEXT: .local i32, i32, i32, i32{{$}}
|
||||
; CHECK-NEXT: i32.const $push, 24{{$}}
|
||||
; CHECK-NEXT: set_local 1, $pop{{$}}
|
||||
; CHECK-NEXT: i32.shl $push, (get_local 0), (get_local 1){{$}}
|
||||
; CHECK-NEXT: set_local 2, $pop{{$}}
|
||||
; CHECK-NEXT: i32.shr_s $push, (get_local 2), (get_local 1){{$}}
|
||||
; CHECK-NEXT: set_local 3, $pop{{$}}
|
||||
; CHECK-NEXT: return (get_local 3){{$}}
|
||||
define signext i8 @z2s_func(i8 zeroext %t) {
|
||||
ret i8 %t
|
||||
}
|
||||
|
||||
; CHECK-LABEL: s2z_func:
|
||||
; CHECK-NEXT: .param i32{{$}}
|
||||
; CHECK-NEXT: .result i32{{$}}
|
||||
; CHECK-NEXT: .local i32, i32, i32{{$}}
|
||||
; CHECK-NEXT: i32.const $push, 255{{$}}
|
||||
; CHECK-NEXT: set_local 1, $pop{{$}}
|
||||
; CHECK-NEXT: i32.and $push, (get_local 0), (get_local 1){{$}}
|
||||
; CHECK-NEXT: set_local 2, $pop{{$}}
|
||||
; CHECK-NEXT: return (get_local 2){{$}}
|
||||
define zeroext i8 @s2z_func(i8 signext %t) {
|
||||
ret i8 %t
|
||||
}
|
||||
|
||||
; CHECK-LABEL: z2s_call:
|
||||
; CHECK-NEXT: .param i32
|
||||
; CHECK-NEXT: .result i32
|
||||
; CHECK-NEXT: .local i32, i32, i32, i32
|
||||
; CHECK-NEXT: i32.const $push, 255
|
||||
; CHECK-NEXT: set_local 1, $pop
|
||||
; CHECK-NEXT: i32.and $push, (get_local 0), (get_local 1)
|
||||
; CHECK-NEXT: set_local 2, $pop
|
||||
; CHECK-NEXT: call z2s_func, $push, (get_local 2)
|
||||
; CHECK-NEXT: set_local 3, $pop
|
||||
; CHECK-NEXT: return (get_local 3)
|
||||
define i32 @z2s_call(i32 %t) {
|
||||
%s = trunc i32 %t to i8
|
||||
%u = call signext i8 @z2s_func(i8 zeroext %s)
|
||||
%v = sext i8 %u to i32
|
||||
ret i32 %v
|
||||
}
|
||||
|
||||
; CHECK-LABEL: s2z_call:
|
||||
; CHECK-NEXT: .param i32
|
||||
; CHECK-NEXT: .result i32
|
||||
; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32, i32
|
||||
; CHECK-NEXT: i32.const $push, 24
|
||||
; CHECK-NEXT: set_local 1, $pop
|
||||
; CHECK-NEXT: i32.shl $push, (get_local 0), (get_local 1)
|
||||
; CHECK-NEXT: set_local 2, $pop
|
||||
; CHECK-NEXT: i32.shr_s $push, (get_local 2), (get_local 1)
|
||||
; CHECK-NEXT: set_local 3, $pop
|
||||
; CHECK-NEXT: call s2z_func, $push, (get_local 3)
|
||||
; CHECK-NEXT: set_local 4, $pop
|
||||
; CHECK-NEXT: i32.shl $push, (get_local 4), (get_local 1)
|
||||
; CHECK-NEXT: set_local 5, $pop
|
||||
; CHECK-NEXT: i32.shr_s $push, (get_local 5), (get_local 1)
|
||||
; CHECK-NEXT: set_local 6, $pop
|
||||
; CHECK-NEXT: return (get_local 6)
|
||||
define i32 @s2z_call(i32 %t) {
|
||||
%s = trunc i32 %t to i8
|
||||
%u = call zeroext i8 @s2z_func(i8 signext %s)
|
||||
%v = sext i8 %u to i32
|
||||
ret i32 %v
|
||||
}
|
Loading…
Reference in New Issue
Block a user