RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-03 01:12:53 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Don't hardcode the %reg format in the streamer.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132451 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2011-06-02 02:34:55 +00:00
parent 491a13691d
commit cde4ce411b
11 changed files with 26 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/llvm/MC/MCInstPrinter.h
View File

@ -45,8 +45,8 @@ public:
/// "MOV32ri") or empty if we can't resolve it.
virtual StringRef getOpcodeName(unsigned Opcode) const;
/// getRegName - Return the assembler register name.
virtual StringRef getRegName(unsigned RegNo) const;
/// printRegName - Print the assembler register name.
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
unsigned getAvailableFeatures() const { return AvailableFeatures; }
void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }

16
lib/MC/MCAsmStreamer.cpp
View File

@ -825,7 +825,7 @@ void MCAsmStreamer::EmitRegisterName(int64_t Register) {
if (InstPrinter) {
const TargetAsmInfo &asmInfo = getContext().getTargetAsmInfo();
unsigned LLVMRegister = asmInfo.getLLVMRegNum(Register, true);
OS << '%' << InstPrinter->getRegName(LLVMRegister);
InstPrinter->printRegName(OS, LLVMRegister);
} else {
OS << Register;
}
@ -1169,8 +1169,10 @@ void MCAsmStreamer::EmitPersonality(const MCSymbol *Personality) {
}
void MCAsmStreamer::EmitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset) {
OS << "\t.setfp\t" << InstPrinter->getRegName(FpReg)
<< ", " << InstPrinter->getRegName(SpReg);
OS << "\t.setfp\t";
InstPrinter->printRegName(OS, FpReg);
OS << ", ";
InstPrinter->printRegName(OS, SpReg);
if (Offset)
OS << ", #" << Offset;
EmitEOL();
@ -1189,10 +1191,12 @@ void MCAsmStreamer::EmitRegSave(const SmallVectorImpl<unsigned> &RegList,
else
OS << "\t.save\t{";
OS << InstPrinter->getRegName(RegList[0]);
InstPrinter->printRegName(OS, RegList[0]);
for (unsigned i = 1, e = RegList.size(); i != e; ++i)
OS << ", " << InstPrinter->getRegName(RegList[i]);
for (unsigned i = 1, e = RegList.size(); i != e; ++i) {
OS << ", ";
InstPrinter->printRegName(OS, RegList[i]);
}
OS << "}";
EmitEOL();

3
lib/MC/MCInstPrinter.cpp
View File

@ -20,7 +20,6 @@ StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
return "";
}
StringRef MCInstPrinter::getRegName(unsigned RegNo) const {
void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
assert(0 && "Target should implement this");
return "";
}

4
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
View File

@ -29,8 +29,8 @@ StringRef ARMInstPrinter::getOpcodeName(unsigned Opcode) const {
return getInstructionName(Opcode);
}
StringRef ARMInstPrinter::getRegName(unsigned RegNo) const {
return getRegisterName(RegNo);
void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {

2
lib/Target/ARM/InstPrinter/ARMInstPrinter.h
View File

@ -28,7 +28,7 @@ public:
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual StringRef getOpcodeName(unsigned Opcode) const;
virtual StringRef getRegName(unsigned RegNo) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
static const char *getInstructionName(unsigned Opcode);

4
lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
View File

@ -26,8 +26,8 @@ StringRef PPCInstPrinter::getOpcodeName(unsigned Opcode) const {
return getInstructionName(Opcode);
}
StringRef PPCInstPrinter::getRegName(unsigned RegNo) const {
return getRegisterName(RegNo);
void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {

2
lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
View File

@ -33,7 +33,7 @@ public:
return SyntaxVariant == 1;
}
StringRef getRegName(unsigned RegNo) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual StringRef getOpcodeName(unsigned Opcode) const;

5
lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
View File

@ -41,8 +41,9 @@ X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
&TM.getSubtarget<X86Subtarget>()));
}
StringRef X86ATTInstPrinter::getRegName(unsigned RegNo) const {
return getRegisterName(RegNo);
void X86ATTInstPrinter::printRegName(raw_ostream &OS,
unsigned RegNo) const {
OS << '%' << getRegisterName(RegNo);
}
void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {

2
lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
View File

@ -26,7 +26,7 @@ class X86ATTInstPrinter : public MCInstPrinter {
public:
X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI);
StringRef getRegName(unsigned RegNo) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &OS);
virtual StringRef getOpcodeName(unsigned Opcode) const;

4
lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
View File

@ -29,8 +29,8 @@ using namespace llvm;
#define GET_INSTRUCTION_NAME
#include "X86GenAsmWriter1.inc"
StringRef X86IntelInstPrinter::getRegName(unsigned RegNo) const {
return getRegisterName(RegNo);
void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {

2
lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
View File

@ -27,7 +27,7 @@ public:
X86IntelInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
: MCInstPrinter(MAI) {}
StringRef getRegName(unsigned RegNo) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &OS);
virtual StringRef getOpcodeName(unsigned Opcode) const;