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Add missing index comments to the left side of the DAG ISel matcher table for each individual case of SwitchOpcode/Type.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191181 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2013-09-22 23:18:50 +00:00
parent ff96efee98
commit cf458e91da
1 changed files with 6 additions and 2 deletions
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8
utils/TableGen/DAGISelMatcherEmitter.cpp
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@ -315,10 +315,12 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
assert(ChildSize != 0 && "Should not have a zero-sized child!"); assert(ChildSize != 0 && "Should not have a zero-sized child!");
if (i != 0) { if (i != 0) {
if (!OmitComments)
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2); OS.PadToColumn(Indent*2);
if (!OmitComments) if (!OmitComments)
OS << (isa<SwitchOpcodeMatcher>(N) ? OS << (isa<SwitchOpcodeMatcher>(N) ?
"/*SwitchOpcode*/ " : "/*SwitchType*/ "); "/*SwitchOpcode*/ " : "/*SwitchType*/ ");
} }
// Emit the VBR. // Emit the VBR.
@ -340,6 +342,8 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
} }
// Emit the final zero to terminate the switch. // Emit the final zero to terminate the switch.
if (!OmitComments)
OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2) << "0, "; OS.PadToColumn(Indent*2) << "0, ";
if (!OmitComments) if (!OmitComments)
OS << (isa<SwitchOpcodeMatcher>(N) ? OS << (isa<SwitchOpcodeMatcher>(N) ?