RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-02-01 00:02:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Add patterns for integer negate

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:06:27 +00:00
parent 8c993e1632
commit cfca8b1f62
3 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
lib/Target/SystemZ/SystemZInstrInfo.td
View File

@ -340,6 +340,21 @@ def MOV64rmm : Pseudo<(outs GR64:$from, GR64:$to), (ins riaddr:$dst),
//===----------------------------------------------------------------------===//
// Arithmetic Instructions
let Defs = [PSW] in {
def NEG32rr : Pseudo<(outs GR32:$dst), (ins GR32:$src),
"lcr\t{$dst, $src}",
[(set GR32:$dst, (ineg GR32:$src)),
(implicit PSW)]>;
def NEG64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src),
"lcgr\t{$dst, $src}",
[(set GR64:$dst, (ineg GR64:$src)),
(implicit PSW)]>;
def NEG64rr32 : Pseudo<(outs GR64:$dst), (ins GR32:$src),
"lcgfr\t{$dst, $src}",
[(set GR64:$dst, (ineg (sext GR32:$src))),
(implicit PSW)]>;
}
let isTwoAddress = 1 in {
let Defs = [PSW] in {

7
test/CodeGen/SystemZ/02-RetNeg.ll Normal file
View File

@ -0,0 +1,7 @@
; RUN: llvm-as < %s | llc -march=systemz | grep lcgr | count 1
define i64 @foo(i64 %a) {
entry:
%c = sub i64 0, %a
ret i64 %c
}

8
test/CodeGen/SystemZ/03-RetNegImmSubreg.ll Normal file
View File

@ -0,0 +1,8 @@
; RUN: llvm-as < %s | llc -march=systemz | grep lcr | count 1
define i32 @foo(i32 %a) {
entry:
%c = sub i32 0, %a
ret i32 %c
}