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[mips] Implement generation of relocations "chains" used by N32 ABI
In case of using a "nested" relocation expressions like this `%hi(%neg(%gp_rel()))`, N32 ABI requires generation of three consecutive relocations. That differs from the N64 ABI case where all relocations are packed into the single relocation record. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313879 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1131,6 +1131,23 @@ void ELFObjectWriter::writeRelocations(const MCAssembler &Asm,
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if (hasRelocationAddend())
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write(uint32_t(Entry.Addend));
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if (TargetObjectWriter->getEMachine() == ELF::EM_MIPS) {
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if (uint32_t RType = TargetObjectWriter->getRType2(Entry.Type)) {
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write(uint32_t(Entry.Offset));
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ERE32.setSymbolAndType(0, RType);
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write(ERE32.r_info);
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write(uint32_t(0));
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}
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if (uint32_t RType = TargetObjectWriter->getRType3(Entry.Type)) {
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write(uint32_t(Entry.Offset));
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ERE32.setSymbolAndType(0, RType);
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write(ERE32.r_info);
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write(uint32_t(0));
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}
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}
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}
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}
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}
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22
test/MC/Mips/elf-N32.s
Normal file
22
test/MC/Mips/elf-N32.s
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@ -0,0 +1,22 @@
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// Check generation of N32 ABI relocations.
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// RUN: llvm-mc -filetype=obj -triple=mips64-linux-gnu -mcpu=mips3 \
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// RUN: -target-abi=n32 %s -o - | llvm-readobj -r | FileCheck %s
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// CHECK: Relocations [
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// CHECK-NEXT: Section (3) .rela.text {
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// CHECK-NEXT: 0x0 R_MIPS_GPREL16 foo 0x4
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// CHECK-NEXT: 0x0 R_MIPS_SUB - 0x0
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// CHECK-NEXT: 0x0 R_MIPS_HI16 - 0x0
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// CHECK-NEXT: 0x4 R_MIPS_GPREL16 foo 0x4
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// CHECK-NEXT: 0x4 R_MIPS_SUB - 0x0
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// CHECK-NEXT: 0x4 R_MIPS_LO16 - 0x0
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// CHECK-NEXT: }
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.globl foo
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.ent foo
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foo:
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lui $gp, %hi(%neg(%gp_rel(foo+4)))
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addiu $gp, $gp, %lo(%neg(%gp_rel(foo+4)))
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daddu $gp, $gp, $25
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.end foo
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