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Update these tests, no longer outputting names for the variables.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135298 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-07-15 20:58:16 +00:00
parent d7932ca962
commit d03ed6b8e7
2 changed files with 6 additions and 6 deletions
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4
test/FrontendC/2010-11-16-asmblock.c
View File

@ -5,8 +5,8 @@
void foo()
{
// CHECK: %0 = call i32 asm sideeffect "", "={ecx}"() nounwind
// CHECK: %asmtmp = call i32 asm sideeffect alignstack "sall $$3, $0", "={ecx},{ecx},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %0) nounwind
// CHECK: %0 = call i32 asm sideeffect "", "={ecx}"() nounwind
// CHECK: %1 = call i32 asm sideeffect alignstack "sall $$3, $0", "={ecx},{ecx},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %0) nounwind
// CHECK: store i32 %asmtmp, i32* %"%ecx"
__asm {
sal ecx, 3;

8
test/FrontendC/asm-reg-var-local.c
View File

@ -10,14 +10,14 @@ int foo() {
// CHECK: store i32 5, i32* %a, align 4
asm volatile("; %0 This asm defines rsi" : "=r"(a));
// CHECK: %asmtmp = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi}
// CHECK: %1 = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi}
// CHECK: store i32 %asmtmp, i32* %a
a = 42;
// CHECK: store i32 42, i32* %a, align 4
asm volatile("; %0 This asm uses rsi" : : "r"(a));
// CHECK: %1 = load i32* %a, align 4
// CHECK: %1 = load i32* %a, align 4
// CHECK: call void asm sideeffect "", "{rsi}"(i32 %1) nounwind
// CHECK: %2 = call i32 asm sideeffect "", "={rsi}"() nounwind
// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 %2)
@ -25,8 +25,8 @@ int foo() {
return a;
// CHECK: %3 = load i32* %a, align 4
// CHECK: call void asm sideeffect "", "{rsi}"(i32 %3) nounwind
// CHECK: %4 = call i32 asm sideeffect "", "={rsi}"() nounwind
// CHECK: %4 = call i32 asm sideeffect "", "={rsi}"() nounwind
// CHECK: store i32 %4, i32* %0, align 4
// CHECK: %5 = load i32* %0, align 4
// CHECK: %5 = load i32* %0, align 4
// CHECK: store i32 %5, i32* %retval, align 4
}