[mips] Fix return lowering

Fix a machine verifier issue where a instruction was using a invalid
register. The return pseudo is expanded and has the return address
register added to it. The return register may have been spuriously
mark as killed earlier.

This partially resolves PR/27458

Thanks to Quentin Colombet for reporting the issue!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297372 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Dardis 2017-03-09 11:19:48 +00:00
parent 0213fce043
commit d0f169de4c
3 changed files with 14 additions and 5 deletions

View File

@ -540,11 +540,20 @@ unsigned MipsSEInstrInfo::getAnalyzableBrOpc(unsigned Opc) const {
void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
MachineInstrBuilder MIB;
if (Subtarget.isGP64bit())
BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
.addReg(Mips::RA_64);
MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
.addReg(Mips::RA_64, RegState::Undef);
else
BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);
MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
.addReg(Mips::RA, RegState::Undef);
// Retain any imp-use flags.
for (auto & MO : I->operands()) {
if (MO.isImplicit())
MIB.add(MO);
}
}
void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,

View File

@ -1,4 +1,4 @@
; RUN: llc -march=mipsel < %s | FileCheck %s
; RUN: llc -march=mipsel -verify-machineinstrs < %s | FileCheck %s
define i8* @f1() nounwind {
entry:

View File

@ -1,4 +1,4 @@
; RUN: llc -march=mipsel < %s | FileCheck %s
; RUN: llc -march=mipsel < %s -verify-machineinstrs | FileCheck %s
define void @tnaked() #0 {