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https://github.com/RPCS3/llvm.git
synced 2025-02-02 08:45:55 +00:00
Add shuffle decoding support for 256-bit pshufd. Merge vpermilp* and pshufd decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149859 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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@ -76,10 +76,19 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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case X86::PSHUFDmi:
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case X86::VPSHUFDmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodePSHUFMask(4, MI->getOperand(MI->getNumOperands()-1).getImm(),
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DecodePSHUFMask(MVT::v4i32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::VPSHUFDYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPSHUFDYmi:
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DestName = getRegName(MI->getOperand(0).getReg());
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DecodePSHUFMask(MVT::v8i32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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break;
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case X86::PSHUFHWri:
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case X86::VPSHUFHWri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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@ -437,31 +446,31 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPERMILPSmi:
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DecodeVPERMILPMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DecodePSHUFMask(MVT::v4f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPERMILPSYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPERMILPSYmi:
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DecodeVPERMILPMask(MVT::v8f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DecodePSHUFMask(MVT::v8f32, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPERMILPDri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPERMILPDmi:
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DecodeVPERMILPMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DecodePSHUFMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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case X86::VPERMILPDYri:
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Src1Name = getRegName(MI->getOperand(1).getReg());
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// FALL THROUGH.
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case X86::VPERMILPDYmi:
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DecodeVPERMILPMask(MVT::v4f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
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DecodePSHUFMask(MVT::v4f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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DestName = getRegName(MI->getOperand(0).getReg());
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break;
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@ -471,7 +480,9 @@ void llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
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// FALL THROUGH.
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case X86::VPERM2F128rm:
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case X86::VPERM2I128rm:
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DecodeVPERM2F128Mask(MI->getOperand(MI->getNumOperands()-1).getImm(),
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// For instruction comments purpose, assume the 256-bit vector is v4i64.
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DecodeVPERM2X128Mask(MVT::v4i64,
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MI->getOperand(MI->getNumOperands()-1).getImm(),
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ShuffleMask);
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Src1Name = getRegName(MI->getOperand(1).getReg());
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DestName = getRegName(MI->getOperand(0).getReg());
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@ -63,11 +63,23 @@ void DecodeMOVLHPSMask(unsigned NElts,
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ShuffleMask.push_back(NElts+i);
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}
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void DecodePSHUFMask(unsigned NElts, unsigned Imm,
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/// DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*.
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/// VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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void DecodePSHUFMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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for (unsigned i = 0; i != NElts; ++i) {
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ShuffleMask.push_back(Imm % NElts);
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Imm /= NElts;
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unsigned NumElts = VT.getVectorNumElements();
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unsigned NumLanes = VT.getSizeInBits() / 128;
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unsigned NumLaneElts = NumElts / NumLanes;
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int NewImm = Imm;
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for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
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for (unsigned i = 0; i != NumLaneElts; ++i) {
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ShuffleMask.push_back(NewImm % NumLaneElts + l);
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NewImm /= NumLaneElts;
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}
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if (NumLaneElts == 4) NewImm = Imm; // reload imm
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}
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}
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@ -95,6 +107,9 @@ void DecodePSHUFLWMask(unsigned Imm,
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ShuffleMask.push_back(7);
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}
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/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
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/// the type of the vector allowing it to handle different datatypes and vector
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/// widths.
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void DecodeSHUFPMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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@ -103,22 +118,24 @@ void DecodeSHUFPMask(EVT VT, unsigned Imm,
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unsigned NumLaneElts = NumElts / NumLanes;
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int NewImm = Imm;
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for (unsigned l = 0; l < NumLanes; ++l) {
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unsigned LaneStart = l * NumLaneElts;
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for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
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// Part that reads from dest.
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for (unsigned i = 0; i != NumLaneElts/2; ++i) {
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ShuffleMask.push_back(NewImm % NumLaneElts + LaneStart);
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ShuffleMask.push_back(NewImm % NumLaneElts + l);
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NewImm /= NumLaneElts;
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}
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// Part that reads from src.
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for (unsigned i = 0; i != NumLaneElts/2; ++i) {
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ShuffleMask.push_back(NewImm % NumLaneElts + NumElts + LaneStart);
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ShuffleMask.push_back(NewImm % NumLaneElts + NumElts + l);
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NewImm /= NumLaneElts;
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}
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if (NumLaneElts == 4) NewImm = Imm; // reload imm
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}
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}
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/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
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/// and punpckh*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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@ -128,10 +145,8 @@ void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
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unsigned NumLaneElts = NumElts / NumLanes;
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for (unsigned s = 0; s < NumLanes; ++s) {
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unsigned Start = s * NumLaneElts + NumLaneElts/2;
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unsigned End = s * NumLaneElts + NumLaneElts;
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for (unsigned i = Start; i != End; ++i) {
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for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
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for (unsigned i = l + NumLaneElts/2, e = l + NumLaneElts; i != e; ++i) {
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ShuffleMask.push_back(i); // Reads from dest/src1
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ShuffleMask.push_back(i+NumElts); // Reads from src/src2
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}
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@ -139,8 +154,8 @@ void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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}
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/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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/// and punpckl*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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@ -150,38 +165,15 @@ void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask) {
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if (NumLanes == 0 ) NumLanes = 1; // Handle MMX
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unsigned NumLaneElts = NumElts / NumLanes;
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for (unsigned s = 0; s < NumLanes; ++s) {
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unsigned Start = s * NumLaneElts;
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unsigned End = s * NumLaneElts + NumLaneElts/2;
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for (unsigned i = Start; i != End; ++i) {
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for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
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for (unsigned i = l, e = l + NumLaneElts/2; i != e; ++i) {
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ShuffleMask.push_back(i); // Reads from dest/src1
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ShuffleMask.push_back(i+NumElts); // Reads from src/src2
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}
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}
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}
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// DecodeVPERMILPMask - Decodes VPERMILPS/ VPERMILPD permutes for any 128-bit
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// 32-bit or 64-bit elements. For 256-bit vectors, it's considered as two 128
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// lanes. For VPERMILPS, referenced elements can't cross lanes and the mask of
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// the first lane must be the same of the second.
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void DecodeVPERMILPMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned NumElts = VT.getVectorNumElements();
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unsigned NumLanes = VT.getSizeInBits() / 128;
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unsigned NumLaneElts = NumElts / NumLanes;
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for (unsigned l = 0; l != NumLanes; ++l) {
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unsigned LaneStart = l*NumLaneElts;
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for (unsigned i = 0; i != NumLaneElts; ++i) {
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unsigned Idx = NumLaneElts == 4 ? (Imm >> (i*2)) & 0x3
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: (Imm >> (i+LaneStart)) & 0x1;
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ShuffleMask.push_back(Idx+LaneStart);
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}
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}
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}
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void DecodeVPERM2F128Mask(EVT VT, unsigned Imm,
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void DecodeVPERM2X128Mask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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unsigned HalfSize = VT.getVectorNumElements()/2;
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unsigned FstHalfBegin = (Imm & 0x3) * HalfSize;
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@ -193,12 +185,4 @@ void DecodeVPERM2F128Mask(EVT VT, unsigned Imm,
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ShuffleMask.push_back(i);
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}
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void DecodeVPERM2F128Mask(unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask) {
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// VPERM2F128 is used by any 256-bit EVT, but X86InstComments only
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// has information about the instruction and not the types. So for
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// instruction comments purpose, assume the 256-bit vector is v4i64.
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return DecodeVPERM2F128Mask(MVT::v4i64, Imm, ShuffleMask);
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}
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} // llvm namespace
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@ -37,7 +37,7 @@ void DecodeMOVHLPSMask(unsigned NElts,
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void DecodeMOVLHPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePSHUFMask(unsigned NElts, unsigned Imm,
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void DecodePSHUFMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePSHUFHWMask(unsigned Imm,
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@ -46,30 +46,24 @@ void DecodePSHUFHWMask(unsigned Imm,
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void DecodePSHUFLWMask(unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
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/// the type of the vector allowing it to handle different datatypes and vector
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/// widths.
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void DecodeSHUFPMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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/// and punpckh*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKHMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
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/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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/// and punpckl*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<unsigned> &ShuffleMask);
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// DecodeVPERMILPMask - Decodes VPERMILPS/ VPERMILPD permutes for any 128-bit
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// 32-bit or 64-bit elements. For 256-bit vectors, it's considered as two 128
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// lanes. For VPERMILPS, referenced elements can't cross lanes and the mask of
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// the first lane must be the same of the second.
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void DecodeVPERMILPMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeVPERM2F128Mask(unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeVPERM2F128Mask(EVT VT, unsigned Imm,
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void DecodeVPERM2X128Mask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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} // llvm namespace
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@ -4430,14 +4430,15 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
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if (Index < 0)
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return DAG.getUNDEF(VT.getVectorElementType());
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int NumElems = VT.getVectorNumElements();
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SDValue NewV = (Index < NumElems) ? SV->getOperand(0) : SV->getOperand(1);
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unsigned NumElems = VT.getVectorNumElements();
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SDValue NewV = (Index < (int)NumElems) ? SV->getOperand(0)
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: SV->getOperand(1);
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return getShuffleScalarElt(NewV.getNode(), Index % NumElems, DAG, Depth+1);
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}
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// Recurse into target specific vector shuffles to find scalars.
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if (isTargetShuffle(Opcode)) {
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int NumElems = VT.getVectorNumElements();
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unsigned NumElems = VT.getVectorNumElements();
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SmallVector<unsigned, 16> ShuffleMask;
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SDValue ImmN;
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@ -4460,9 +4461,9 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
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DecodeMOVLHPSMask(NumElems, ShuffleMask);
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break;
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case X86ISD::PSHUFD:
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case X86ISD::VPERMILP:
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ImmN = N->getOperand(N->getNumOperands()-1);
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DecodePSHUFMask(NumElems,
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cast<ConstantSDNode>(ImmN)->getZExtValue(),
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DecodePSHUFMask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(),
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ShuffleMask);
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break;
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case X86ISD::PSHUFHW:
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@ -4484,14 +4485,9 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
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return getShuffleScalarElt(V.getOperand(OpNum).getNode(), Index, DAG,
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Depth+1);
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}
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case X86ISD::VPERMILP:
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ImmN = N->getOperand(N->getNumOperands()-1);
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DecodeVPERMILPMask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(),
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ShuffleMask);
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break;
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case X86ISD::VPERM2X128:
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ImmN = N->getOperand(N->getNumOperands()-1);
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DecodeVPERM2F128Mask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(),
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DecodeVPERM2X128Mask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(),
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ShuffleMask);
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break;
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case X86ISD::MOVDDUP:
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@ -4509,7 +4505,8 @@ static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
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if (Index < 0)
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return DAG.getUNDEF(VT.getVectorElementType());
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SDValue NewV = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
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SDValue NewV = (Index < (int)NumElems) ? N->getOperand(0)
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: N->getOperand(1);
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return getShuffleScalarElt(NewV.getNode(), Index % NumElems, DAG,
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Depth+1);
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}
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