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Remove invalid assert in DAGTypeLegalizer::RemapValue

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There is a comment at the top of DAGTypeLegalizer::PerformExpensiveChecks
which, in part, says:

  // Note that these invariants may not hold momentarily when processing a node:
  // the node being processed may be put in a map before being marked Processed.

Unfortunately, this assert would be valid only if the above-mentioned invariant
held unconditionally. This was causing llc to assert when, in fact,
everything was fine.

Thanks to Richard Sandiford for investigating this issue!

Fixes PR16562.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186338 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2013-07-15 18:57:05 +00:00
parent f7b6f55e4c
commit d1654a769c
2 changed files with 61 additions and 1 deletions
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5
lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
View File

@ -615,7 +615,10 @@ void DAGTypeLegalizer::RemapValue(SDValue &N) {
// replaced with other values.
RemapValue(I->second);
N = I->second;
assert(N.getNode()->getNodeId() != NewNode && "Mapped to new node!");
// Note that it is possible to have N.getNode()->getNodeId() == NewNode at
// this point because it is possible for a node to be put in the map before
// being processed.
}
}

57
test/CodeGen/PowerPC/remap-crash.ll Normal file
View File

@ -0,0 +1,57 @@
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
target triple = "powerpc64-unknown-linux-gnu"
define void @autogen_SD13() {
BB:
br label %CF78
CF78: ; preds = %CF87, %CF86, %CF78, %BB
%Cmp = icmp ule <16 x i64> zeroinitializer, zeroinitializer
br i1 undef, label %CF78, label %CF86
CF86: ; preds = %CF78
br i1 undef, label %CF78, label %CF84
CF84: ; preds = %CF84, %CF86
br i1 undef, label %CF84, label %CF87
CF87: ; preds = %CF84
br i1 undef, label %CF78, label %CF82
CF82: ; preds = %CF82, %CF87
br i1 undef, label %CF82, label %CF83
CF83: ; preds = %CF82
br label %CF
CF: ; preds = %CF80, %CF81, %CF, %CF83
br i1 undef, label %CF, label %CF81
CF81: ; preds = %CF
%Se = sext <16 x i1> %Cmp to <16 x i16>
br i1 undef, label %CF, label %CF80
CF80: ; preds = %CF81
br i1 undef, label %CF, label %CF76
CF76: ; preds = %CF76, %CF80
%Sl58 = select i1 undef, <16 x i16> %Se, <16 x i16> %Se
br label %CF76
}
define void @autogen_SD1067() {
BB:
%FC = sitofp <4 x i32> zeroinitializer to <4 x ppc_fp128>
br label %CF77
CF77: ; preds = %CF77, %BB
%brmerge = or i1 false, undef
br i1 %brmerge, label %CF77, label %CF85
CF85: ; preds = %CF77
%Shuff19 = shufflevector <4 x ppc_fp128> %FC, <4 x ppc_fp128> %FC, <4 x i32> <i32 7, i32 1, i32 3, i32 5>
br label %CF75
CF75: ; preds = %CF75, %CF85
br label %CF75
}