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Add a RequireStructuredCFG Field to TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196634 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -238,6 +238,12 @@ For some targets, you also need to support the following methods:
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* ``getTargetLowering()``
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* ``getJITInfo()``
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Some architectures, such as GPUs, do not support jumping to an arbitrary
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program location and implement branching using masked execution and loop using
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special instructions around the loop body. In order to avoid CFG modifications
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that introduce irreducible control flow not handled by such hardware, a target
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must call `setRequiresStructuredCFG(true)` when being initialized.
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In addition, the ``XXXTargetMachine`` constructor should specify a
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``TargetDescription`` string that determines the data layout for the target
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machine, including characteristics such as pointer size, alignment, and
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@ -88,6 +88,7 @@ protected: // Can only create subclasses.
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unsigned MCUseLoc : 1;
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unsigned MCUseCFI : 1;
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unsigned MCUseDwarfDirectory : 1;
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unsigned RequireStructuredCFG : 1;
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public:
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virtual ~TargetMachine();
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@ -156,6 +157,9 @@ public:
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return 0;
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}
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bool requiresStructuredCFG() const { return RequireStructuredCFG; }
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void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
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/// hasMCRelaxAll - Check whether all machine code instructions should be
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/// relaxed.
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bool hasMCRelaxAll() const { return MCRelaxAll; }
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@ -83,7 +83,11 @@ INITIALIZE_PASS(BranchFolderPass, "branch-folder",
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bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
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TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
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BranchFolder Folder(PassConfig->getEnableTailMerge(), /*CommonHoist=*/true);
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// TailMerge can create jump into if branches that make CFG irreducible for
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// HW that requires structurized CFG.
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bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
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PassConfig->getEnableTailMerge();
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BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true);
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return Folder.OptimizeFunction(MF,
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MF.getTarget().getInstrInfo(),
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MF.getTarget().getRegisterInfo(),
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@ -677,6 +677,11 @@ MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
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MachineFunction *MF = getParent();
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DebugLoc dl; // FIXME: this is nowhere
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// Performance might be harmed on HW that implements branching using exec mask
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// where both sides of the branches are always executed.
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if (MF->getTarget().requiresStructuredCFG())
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return NULL;
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// We may need to update this's terminator, but we can't do that if
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// AnalyzeBranch fails. If this uses a jump table, we won't touch it.
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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@ -725,7 +725,10 @@ void TargetPassConfig::addMachineLateOptimization() {
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printAndVerify("After BranchFolding");
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// Tail duplication.
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if (addPass(&TailDuplicateID))
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// Note that duplicating tail just increases code size and degrades
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// performance for targets that require Structured Control Flow.
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// In addition it can also make CFG irreducible. Thus we disable it.
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if (!TM->requiresStructuredCFG() && addPass(&TailDuplicateID))
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printAndVerify("After TailDuplicate");
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// Copy propagation.
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@ -72,6 +72,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
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InstrInfo.reset(new SIInstrInfo(*this));
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TLInfo.reset(new SITargetLowering(*this));
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}
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setRequiresStructuredCFG(true);
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initAsmInfo();
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}
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@ -55,6 +55,7 @@ TargetMachine::TargetMachine(const Target &T,
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MCUseLoc(true),
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MCUseCFI(true),
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MCUseDwarfDirectory(false),
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RequireStructuredCFG(false),
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Options(Options) {
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}
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@ -1,6 +1,6 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: JUMP @3
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; CHECK: JUMP @6
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; CHECK: EXPORT
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; CHECK-NOT: EXPORT
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