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* Move frame and constant pool indexes to first argument of memory reference
so we can put an offset in there as well... * Fix long/ulong stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5231 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -123,27 +123,29 @@ void X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
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void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
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void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
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MachineBasicBlock::iterator &II) const {
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MachineBasicBlock::iterator &II) const {
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unsigned i = 3;
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unsigned i = 0;
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MachineInstr &MI = **II;
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MachineInstr &MI = **II;
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while (!MI.getOperand(i).isFrameIndex()) {
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while (!MI.getOperand(i).isFrameIndex()) {
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++i;
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++i;
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assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
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assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
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}
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}
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// This must be part of a four operand memory reference. Replace the
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// FrameIndex with the offset and the base register with EBP.
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MI.SetMachineOperandReg(i-3, hasFP(MF) ? X86::EBP : X86::ESP);
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// Now replace the frame index itself with the offset from EBP.
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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// This must be part of a four operand memory reference. Replace the
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// FrameIndex with base register with EBP. Add add an offset to the offset.
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MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
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// Now add the frame object offset to the offset from EBP.
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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MI.getOperand(i+3).getImmedValue();
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if (!hasFP(MF) && hasSPAdjust(MF)) {
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if (!hasFP(MF) && hasSPAdjust(MF)) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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Offset += MFI->getStackSize() + MFI->getMaxCallFrameSize();
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Offset += MFI->getStackSize() + MFI->getMaxCallFrameSize();
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}
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}
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MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
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MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
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}
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}
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void X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
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void X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
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@ -332,15 +334,14 @@ X86RegisterInfo::X86RegisterInfo()
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const TargetRegisterClass*
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const TargetRegisterClass*
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X86RegisterInfo::getRegClassForType(const Type* Ty) const {
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X86RegisterInfo::getRegClassForType(const Type* Ty) const {
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switch (Ty->getPrimitiveID()) {
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switch (Ty->getPrimitiveID()) {
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default: assert(0 && "Invalid type to getClass!");
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case Type::LongTyID:
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case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
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default: assert(0 && "Invalid type to getClass!");
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case Type::BoolTyID:
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case Type::BoolTyID:
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case Type::SByteTyID:
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case Type::SByteTyID:
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case Type::UByteTyID: return &X86ByteRegisterClassInstance;
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case Type::UByteTyID: return &X86ByteRegisterClassInstance;
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case Type::ShortTyID:
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case Type::ShortTyID:
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case Type::UShortTyID: return &X86ShortRegisterClassInstance;
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case Type::UShortTyID: return &X86ShortRegisterClassInstance;
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case Type::LongTyID: // FIXME: Longs are not handled yet!
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case Type::ULongTyID: // FIXME: Treat these like ints, this is bogus!
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case Type::IntTyID:
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case Type::IntTyID:
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case Type::UIntTyID:
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case Type::UIntTyID:
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case Type::PointerTyID: return &X86IntRegisterClassInstance;
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case Type::PointerTyID: return &X86IntRegisterClassInstance;
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