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Remove some register allocation order dependencies.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172874 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2013-01-19 00:03:32 +00:00
parent 6fff325fb6
commit d32eea9636
4 changed files with 12 additions and 12 deletions
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6
test/CodeGen/ARM/fabss.ll
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@ -14,12 +14,12 @@ entry:
declare float @fabsf(float)
; VFP2: test:
; VFP2: vabs.f32 s2, s2
; VFP2: vabs.f32 s
; NFP1: test:
; NFP1: vabs.f32 d1, d1
; NFP1: vabs.f32 d
; NFP0: test:
; NFP0: vabs.f32 s2, s2
; NFP0: vabs.f32 s
; CORTEXA8: test:
; CORTEXA8: vadd.f32 [[D1:d[0-9]+]]

8
test/CodeGen/ARM/fdivs.ll
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@ -10,14 +10,14 @@ entry:
}
; VFP2: test:
; VFP2: vdiv.f32 s0, s2, s0
; VFP2: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; NFP1: test:
; NFP1: vdiv.f32 s0, s2, s0
; NFP1: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; NFP0: test:
; NFP0: vdiv.f32 s0, s2, s0
; NFP0: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; CORTEXA8: test:
; CORTEXA8: vdiv.f32 s0, s2, s0
; CORTEXA8: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; CORTEXA9: test:
; CORTEXA9: vdiv.f32 s{{.}}, s{{.}}, s{{.}}

8
test/CodeGen/ARM/fnmscs.ll
View File

@ -46,8 +46,8 @@ entry:
; NEON: vnmla.f64
; A8: t3:
; A8: vnmul.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}}
; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}}
; A8: vnmul.f64 d
; A8: vsub.f64 d
%0 = fmul double %a, %b
%1 = fsub double -0.0, %0
%2 = fsub double %1, %acc
@ -63,8 +63,8 @@ entry:
; NEON: vnmla.f64
; A8: t4:
; A8: vnmul.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}}
; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}}
; A8: vnmul.f64 d
; A8: vsub.f64 d
%0 = fmul double %a, %b
%1 = fmul double -1.0, %0
%2 = fsub double %1, %acc

2
test/CodeGen/Thumb2/cortex-fp.ll
View File

@ -7,7 +7,7 @@ define float @foo(float %a, float %b) {
entry:
; CHECK: foo
; CORTEXM3: blx ___mulsf3
; CORTEXM4: vmul.f32 s0, s2, s0
; CORTEXM4: vmul.f32 s
; CORTEXA8: vmul.f32 d
%0 = fmul float %a, %b
ret float %0