From d389f8dd86bf2e261b648ceb64470bd5d1c1cde0 Mon Sep 17 00:00:00 2001 From: Saleem Abdulrasool Date: Thu, 9 Jun 2016 02:56:40 +0000 Subject: [PATCH] AArch64: support the `.arch` directive in the IAS Add support to the AArch64 IAS for the `.arch` directive. This allows the assembly input to use architectural functionality in part of a file. This is used in existing code like BoringSSL. Resolves PR26016! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272241 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64/AsmParser/AArch64AsmParser.cpp | 28 +++++++++++ test/MC/AArch64/directive-arch.s | 47 +++++++++++++++++++ 2 files changed, 75 insertions(+) create mode 100644 test/MC/AArch64/directive-arch.s diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 013c3b9fbaa..e43fc2cc784 100644 --- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -30,6 +30,7 @@ #include "llvm/MC/MCSymbol.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/SourceMgr.h" +#include "llvm/Support/TargetParser.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" #include @@ -69,6 +70,7 @@ private: bool Error(SMLoc L, const Twine &Msg) { return getParser().Error(L, Msg); } bool showMatchError(SMLoc Loc, unsigned ErrCode); + bool parseDirectiveArch(SMLoc L); bool parseDirectiveCPU(SMLoc L); bool parseDirectiveWord(unsigned Size, SMLoc L); bool parseDirectiveInst(SMLoc L); @@ -4195,6 +4197,8 @@ bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) { StringRef IDVal = DirectiveID.getIdentifier(); SMLoc Loc = DirectiveID.getLoc(); + if (IDVal == ".arch") + return parseDirectiveArch(Loc); if (IDVal == ".cpu") return parseDirectiveCPU(Loc); if (IDVal == ".hword") @@ -4235,6 +4239,30 @@ static const struct { { "profile", {} }, }; +/// parseDirectiveArch +/// ::= .arch token +bool AArch64AsmParser::parseDirectiveArch(SMLoc L) { + SMLoc ArchLoc = getLoc(); + + StringRef Arch, ExtensionString; + std::tie(Arch, ExtensionString) = + getParser().parseStringToEndOfStatement().trim().split('+'); + + unsigned ID = AArch64::parseArch(Arch); + if (ID == ARM::AK_INVALID) { + Error(ArchLoc, "unknown arch name"); + return false; + } + + MCSubtargetInfo &STI = copySTI(); + STI.setDefaultFeatures("", ""); + if (!ExtensionString.empty()) + STI.setDefaultFeatures("", ("+" + ExtensionString).str()); + setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits())); + + return false; +} + /// parseDirectiveCPU /// ::= .cpu id bool AArch64AsmParser::parseDirectiveCPU(SMLoc L) { diff --git a/test/MC/AArch64/directive-arch.s b/test/MC/AArch64/directive-arch.s new file mode 100644 index 00000000000..c73128b9e1e --- /dev/null +++ b/test/MC/AArch64/directive-arch.s @@ -0,0 +1,47 @@ +// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | Filecheck %s + + .arch axp64 +# CHECK: error: unknown arch name +# CHECK: .arch axp64 +# CHECK: ^ + + .arch armv8 + + fminnm d0, d0, d1 + +# CHECK: error: instruction requires: fp-armv8 +# CHECK: fminnm d0, d0, d1 +# CHECK: ^ + + .arch armv8+fp + +# CHECK: '+fp' is not a recognized feature for this target (ignoring feature) + + fminnm d0, d0, d1 + +# CHECK: error: instruction requires: fp-armv8 +# CHECK: fminnm d0, d0, d1 +# CHECK: ^ + + .arch armv8+neon + + fminnm d0, d0, d1 + + .arch armv8 + + fminnm d0, d0, d1 + +# CHECK: error: instruction requires: fp-armv8 +# CHECK: fminnm d0, d0, d1 +# CHECK: ^ + + .arch armv8-a+crypto + + aesd v0.16b, v2.16b + + .arch armv8.1-a+ras + esb + +# CHECK: fminnm d0, d0, d1 +# CHECK: aesd v0.16b, v2.16b +# CHECK: esb