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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7503 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -490,7 +490,8 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// Loop over all of the operands of the instruction, spilling registers that
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// are defined, and marking explicit destinations in the PhysRegsUsed map.
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
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if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse()) &&
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if ((MI->getOperand(i).opIsDefOnly() ||
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MI->getOperand(i).opIsDefAndUse()) &&
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MI->getOperand(i).isPhysicalRegister()) {
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unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
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spillPhysReg(MBB, I, Reg); // Spill any existing value in the reg
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