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Avoid iterating with LiveIntervals::iterator.

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That is a DenseMap iterator keyed by pointers, so the iteration order is
nondeterministic.

I would like to replace the DenseMap with an IndexedMap which doesn't
allow iteration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158856 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-06-20 21:25:05 +00:00
parent 02a227af91
commit d67582e276
3 changed files with 44 additions and 40 deletions
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18
lib/CodeGen/CalcSpillWeights.cpp
View File

@ -39,18 +39,20 @@ void CalculateSpillWeights::getAnalysisUsage(AnalysisUsage &au) const {
MachineFunctionPass::getAnalysisUsage(au);
}
bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &fn) {
bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &MF) {
DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
<< "********** Function: "
<< fn.getFunction()->getName() << '\n');
<< MF.getFunction()->getName() << '\n');
LiveIntervals &lis = getAnalysis<LiveIntervals>();
VirtRegAuxInfo vrai(fn, lis, getAnalysis<MachineLoopInfo>());
for (LiveIntervals::iterator I = lis.begin(), E = lis.end(); I != E; ++I) {
LiveInterval &li = *I->second;
if (TargetRegisterInfo::isVirtualRegister(li.reg))
vrai.CalculateWeightAndHint(li);
LiveIntervals &LIS = getAnalysis<LiveIntervals>();
MachineRegisterInfo &MRI = MF.getRegInfo();
VirtRegAuxInfo VRAI(MF, LIS, getAnalysis<MachineLoopInfo>());
for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (MRI.reg_nodbg_empty(Reg))
continue;
VRAI.CalculateWeightAndHint(LIS.getInterval(Reg));
}
return false;
}

44
lib/CodeGen/RegAllocBase.cpp
View File

@ -67,18 +67,18 @@ void RegAllocBase::verify() {
}
// Verify vreg coverage.
for (LiveIntervals::iterator liItr = LIS->begin(), liEnd = LIS->end();
liItr != liEnd; ++liItr) {
unsigned reg = liItr->first;
LiveInterval* li = liItr->second;
if (TargetRegisterInfo::isPhysicalRegister(reg)) continue;
if (!VRM->hasPhys(reg)) continue; // spilled?
if (li->empty()) continue; // unionVRegs will only be filled if li is
// non-empty
unsigned PhysReg = VRM->getPhys(reg);
if (!unionVRegs[PhysReg].test(reg)) {
dbgs() << "LiveVirtReg " << PrintReg(reg, TRI) << " not in union " <<
TRI->getName(PhysReg) << "\n";
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (MRI->reg_nodbg_empty(Reg))
continue;
if (!VRM->hasPhys(Reg)) continue; // spilled?
LiveInterval &LI = LIS->getInterval(Reg);
if (LI.empty()) continue; // unionVRegs will only be filled if li is
// non-empty
unsigned PhysReg = VRM->getPhys(Reg);
if (!unionVRegs[PhysReg].test(Reg)) {
dbgs() << "LiveVirtReg " << PrintReg(Reg, TRI) << " not in union "
<< TRI->getName(PhysReg) << "\n";
llvm_unreachable("unallocated live vreg");
}
}
@ -117,13 +117,19 @@ void RegAllocBase::releaseMemory() {
// them on the priority queue for later assignment.
void RegAllocBase::seedLiveRegs() {
NamedRegionTimer T("Seed Live Regs", TimerGroupName, TimePassesIsEnabled);
for (LiveIntervals::iterator I = LIS->begin(), E = LIS->end(); I != E; ++I) {
unsigned RegNum = I->first;
LiveInterval &VirtReg = *I->second;
if (TargetRegisterInfo::isPhysicalRegister(RegNum))
PhysReg2LiveUnion[RegNum].unify(VirtReg);
else
enqueue(&VirtReg);
// Physregs.
for (unsigned Reg = 1, e = TRI->getNumRegs(); Reg != e; ++Reg) {
if (!LIS->hasInterval(Reg))
continue;
PhysReg2LiveUnion[Reg].unify(LIS->getInterval(Reg));
}
// Virtregs.
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (MRI->reg_nodbg_empty(Reg))
continue;
enqueue(&LIS->getInterval(Reg));
}
}

22
lib/CodeGen/RegAllocPBQP.cpp
View File

@ -205,12 +205,11 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
RegSet pregs;
// Collect the set of preg intervals, record that they're used in the MF.
for (LiveIntervals::const_iterator itr = lis->begin(), end = lis->end();
itr != end; ++itr) {
if (TargetRegisterInfo::isPhysicalRegister(itr->first)) {
pregs.insert(itr->first);
mri->setPhysRegUsed(itr->first);
}
for (unsigned Reg = 1, e = tri->getNumRegs(); Reg != e; ++Reg) {
if (!lis->hasInterval(Reg))
continue;
pregs.insert(Reg);
mri->setPhysRegUsed(Reg);
}
BitVector reservedRegs = tri->getReservedRegs(*mf);
@ -501,14 +500,11 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
void RegAllocPBQP::findVRegIntervalsToAlloc() {
// Iterate over all live ranges.
for (LiveIntervals::iterator itr = lis->begin(), end = lis->end();
itr != end; ++itr) {
// Ignore physical ones.
if (TargetRegisterInfo::isPhysicalRegister(itr->first))
for (unsigned i = 0, e = mri->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (mri->reg_nodbg_empty(Reg))
continue;
LiveInterval *li = itr->second;
LiveInterval *li = &lis->getInterval(Reg);
// If this live interval is non-empty we will use pbqp to allocate it.
// Empty intervals we allocate in a simple post-processing stage in