RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-30 07:14:53 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Fix warnings.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19933 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-30 16:32:48 +00:00
parent 684f229895
commit d7b59d0181
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -1149,7 +1149,7 @@ void ISel::Select(SDOperand N) {
Tmp2 = SelectExpr(N.getOperand(2));
switch (StoredTy) {
default: Node->dump(); assert(0 && "Unhandled Type"); break;
default: Node->dump(); assert(0 && "Unhandled Type");
case MVT::i1: //FIXME: DAG does not promote this load
case MVT::i8: Opc = Alpha::STB; break;
case MVT::i16: Opc = Alpha::STW; break;

2
lib/Target/Alpha/AlphaRegisterInfo.cpp
View File

@ -108,7 +108,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
Amount = (Amount+Align-1)/Align*Align;
MachineInstr *New;
// MachineInstr *New;
// if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
// New=BuildMI(X86::SUB32ri, 1, X86::ESP, MachineOperand::UseAndDef)
// .addZImm(Amount);