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[NFC] MIR-Canon: switching to a stable string sorting of instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332191 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Puyan Lotfi 2018-05-13 06:07:20 +00:00
parent 44156e3f61
commit d8ca4dd711
2 changed files with 12 additions and 5 deletions
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10
lib/CodeGen/MIRCanonicalizerPass.cpp
View File

@ -120,7 +120,8 @@ rescheduleLexographically(std::vector<MachineInstr *> instructions,
std::function<MachineBasicBlock::iterator()> getPos) {
bool Changed = false;
std::map<std::string, MachineInstr *> StringInstrMap;
using StringInstrPair = std::pair<std::string, MachineInstr *>;
std::vector<StringInstrPair> StringInstrMap;
for (auto *II : instructions) {
std::string S;
@ -130,9 +131,14 @@ rescheduleLexographically(std::vector<MachineInstr *> instructions,
// Trim the assignment, or start from the begining in the case of a store.
const size_t i = S.find("=");
StringInstrMap.insert({(i == std::string::npos) ? S : S.substr(i), II});
StringInstrMap.push_back({(i == std::string::npos) ? S : S.substr(i), II});
}
std::sort(StringInstrMap.begin(), StringInstrMap.end(),
[](StringInstrPair &a, StringInstrPair &b) {
return (a.first < b.first);
});
for (auto &II : StringInstrMap) {
DEBUG({

7
test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
View File

@ -2,9 +2,10 @@
# These Idempotent instructions are sorted alphabetically (based on after the '=')
# CHECK: %namedVReg4352:gpr64 = MOVi64imm 4617315517961601024
# CHECK: %namedVReg4353:gpr32 = MOVi32imm 408
# CHECK: %namedVReg4354:gpr64all = IMPLICIT_DEF
# CHECK: %namedVReg4355:fpr64 = FMOVDi 20
# CHECK: %namedVReg4356:fpr64 = FMOVDi 112
# CHECK: %namedVReg4354:gpr32 = MOVi32imm 408
# CHECK: %namedVReg4355:gpr64all = IMPLICIT_DEF
# CHECK: %namedVReg4356:fpr64 = FMOVDi 20
# CHECK: %namedVReg4357:fpr64 = FMOVDi 112
...
---
name: Proc8