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The sign of an srem instruction is the sign of its dividend (the first

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argument), regardless of the divisor. Teach instcombine about this and fix
test7 in PR9343!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nick Lewycky 2011-02-28 06:20:05 +00:00
parent ec58f20df3
commit d8d1584c13
2 changed files with 23 additions and 3 deletions
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16
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -1340,6 +1340,16 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
}
}
break;
case Instruction::SRem: {
bool TrueIfSigned;
if (LHSI->hasOneUse() &&
isSignBitCheck(ICI.getPredicate(), RHS, TrueIfSigned)) {
// srem has the same sign as its dividend so the divisor is irrelevant.
return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), RHS);
}
break;
}
}
// Simplify icmp_eq and icmp_ne instructions with integer constant RHS.
@ -1855,11 +1865,11 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
return new ICmpInst(ICmpInst::ICMP_SLT, Op0,
ConstantInt::get(CI->getContext(), CI->getValue()+1));
case ICmpInst::ICMP_UGE:
assert(!CI->isMinValue(false)); // A >=u MIN -> TRUE
assert(!CI->isMinValue(false)); // A >=u MIN -> TRUE
return new ICmpInst(ICmpInst::ICMP_UGT, Op0,
ConstantInt::get(CI->getContext(), CI->getValue()-1));
case ICmpInst::ICMP_SGE:
assert(!CI->isMinValue(true)); // A >=s MIN -> TRUE
assert(!CI->isMinValue(true)); // A >=s MIN -> TRUE
return new ICmpInst(ICmpInst::ICMP_SGT, Op0,
ConstantInt::get(CI->getContext(), CI->getValue()-1));
}
@ -1913,7 +1923,7 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
ConstantInt::get(I.getContext(), Op1Min));
// Based on the range information we know about the LHS, see if we can
// simplify this comparison. For example, (x&4) < 8 is always true.
// simplify this comparison. For example, (x&4) < 8 is always true.
switch (I.getPredicate()) {
default: llvm_unreachable("Unknown icmp opcode!");
case ICmpInst::ICMP_EQ: {

10
test/Transforms/InstCombine/icmp.ll
View File

@ -377,3 +377,13 @@ define i1 @test38(i32 %x, i32 %y, i32 %z) {
%c = icmp ugt i32 %lhs, %rhs
ret i1 %c
}
; PR9343 #7
; CHECK: @test39
; CHECK: ret i1 false
define i1 @test39(i31 %X, i32 %Y) {
%A = zext i31 %X to i32
%B = srem i32 %A, %Y
%C = icmp slt i32 %B, 0
ret i1 %C
}