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Change stack probing code for MingW.

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Since gcc 4.6 the compiler uses ___chkstk_ms which has the same semantics as the
MS CRT function __chkstk. This simplifies the prologue generation a bit.

Reviewed by Rafael Espíndola. 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197205 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kai Nacke 2013-12-13 05:37:05 +00:00
parent e93ec87db1
commit da44c36d64
3 changed files with 13 additions and 15 deletions
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16
lib/Target/X86/X86FrameLowering.cpp
View File

@ -608,14 +608,12 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
// virtual memory manager are allocated in correct sequence. // virtual memory manager are allocated in correct sequence.
if (NumBytes >= 4096 && STI.isOSWindows() && !STI.isTargetMacho()) { if (NumBytes >= 4096 && STI.isOSWindows() && !STI.isTargetMacho()) {
const char *StackProbeSymbol; const char *StackProbeSymbol;
bool isSPUpdateNeeded = false;
if (Is64Bit) { if (Is64Bit) {
if (STI.isTargetCygMing()) if (STI.isTargetCygMing()) {
StackProbeSymbol = "___chkstk"; StackProbeSymbol = "___chkstk_ms";
else { } else {
StackProbeSymbol = "__chkstk"; StackProbeSymbol = "__chkstk";
isSPUpdateNeeded = true;
} }
} else if (STI.isTargetCygMing()) } else if (STI.isTargetCygMing())
StackProbeSymbol = "_alloca"; StackProbeSymbol = "_alloca";
@ -657,15 +655,15 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
.addReg(X86::EFLAGS, RegState::Define | RegState::Implicit) .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
// MSVC x64's __chkstk does not adjust %rsp itself. if (Is64Bit) {
// It also does not clobber %rax so we can reuse it when adjusting %rsp. // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
if (isSPUpdateNeeded) { // themself. It also does not clobber %rax so we can reuse it when
// adjusting %rsp.
BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), StackPtr) BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), StackPtr)
.addReg(StackPtr) .addReg(StackPtr)
.addReg(X86::RAX) .addReg(X86::RAX)
.setMIFlag(MachineInstr::FrameSetup); .setMIFlag(MachineInstr::FrameSetup);
} }
if (isEAXAlive) { if (isEAXAlive) {
// Restore EAX // Restore EAX
MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm),

6
test/CodeGen/X86/win64_alloca_dynalloca.ll
View File

@ -12,11 +12,11 @@ entry:
%buf0 = alloca i8, i64 4096, align 1 %buf0 = alloca i8, i64 4096, align 1
; ___chkstk must adjust %rsp. ; ___chkstk_ms does not adjust %rsp.
; M64: movq %rsp, %rbp ; M64: movq %rsp, %rbp
; M64: $4096, %rax ; M64: $4096, %rax
; M64: callq ___chkstk ; M64: callq ___chkstk_ms
; M64-NOT: %rsp ; M64: subq %rax, %rsp
; __chkstk does not adjust %rsp. ; __chkstk does not adjust %rsp.
; W64: movq %rsp, %rbp ; W64: movq %rsp, %rbp

6
test/CodeGen/X86/win_chkstk.ll
View File

@ -17,7 +17,7 @@ entry:
; WIN_X32: calll __chkstk ; WIN_X32: calll __chkstk
; WIN_X64: callq __chkstk ; WIN_X64: callq __chkstk
; MINGW_X32: calll __alloca ; MINGW_X32: calll __alloca
; MINGW_X64: callq ___chkstk ; MINGW_X64: callq ___chkstk_ms
; LINUX-NOT: call __chkstk ; LINUX-NOT: call __chkstk
%array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0] %array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0]
ret i32 0 ret i32 0
@ -36,7 +36,7 @@ entry:
; WIN_X64: ret ; WIN_X64: ret
; MINGW_X64: # BB#0: ; MINGW_X64: # BB#0:
; MINGW_X64-NOT: callq _alloca ; MINGW_X64-NOT: callq ___chkstk_ms
; MINGW_X64: ret ; MINGW_X64: ret
; LINUX: # BB#0: ; LINUX: # BB#0:
@ -53,7 +53,7 @@ entry:
; WIN_X32: calll __chkstk ; WIN_X32: calll __chkstk
; WIN_X64: callq __chkstk ; WIN_X64: callq __chkstk
; MINGW_X32: calll __alloca ; MINGW_X32: calll __alloca
; MINGW_X64: callq ___chkstk ; MINGW_X64: callq ___chkstk_ms
; LINUX-NOT: call __chkstk ; LINUX-NOT: call __chkstk
%array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0] %array4096 = alloca [4096 x i8], align 16 ; <[4096 x i8]*> [#uses=0]
ret i32 0 ret i32 0