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[ARM] Check the right order for halves of VZIP/VUZP if both parts are used
This is the exact same fix as in SVN r247254. In that commit, the fix was applied only for isVTRNMask and isVTRN_v_undef_Mask, but the same issue is present for VZIP/VUZP as well. This fixes PR33921. Differential Revision: https://reviews.llvm.org/D36899 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311258 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5901,7 +5901,10 @@ static bool isVUZPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
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return false;
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for (unsigned i = 0; i < M.size(); i += NumElts) {
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WhichResult = M[i] == 0 ? 0 : 1;
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if (M.size() == NumElts * 2)
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WhichResult = i / NumElts;
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else
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WhichResult = M[i] == 0 ? 0 : 1;
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for (unsigned j = 0; j < NumElts; ++j) {
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if (M[i+j] >= 0 && (unsigned) M[i+j] != 2 * j + WhichResult)
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return false;
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@ -5932,7 +5935,10 @@ static bool isVUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult){
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unsigned Half = NumElts / 2;
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for (unsigned i = 0; i < M.size(); i += NumElts) {
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WhichResult = M[i] == 0 ? 0 : 1;
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if (M.size() == NumElts * 2)
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WhichResult = i / NumElts;
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else
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WhichResult = M[i] == 0 ? 0 : 1;
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for (unsigned j = 0; j < NumElts; j += Half) {
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unsigned Idx = WhichResult;
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for (unsigned k = 0; k < Half; ++k) {
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@ -5972,7 +5978,10 @@ static bool isVZIPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
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return false;
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for (unsigned i = 0; i < M.size(); i += NumElts) {
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WhichResult = M[i] == 0 ? 0 : 1;
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if (M.size() == NumElts * 2)
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WhichResult = i / NumElts;
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else
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WhichResult = M[i] == 0 ? 0 : 1;
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unsigned Idx = WhichResult * NumElts / 2;
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for (unsigned j = 0; j < NumElts; j += 2) {
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if ((M[i+j] >= 0 && (unsigned) M[i+j] != Idx) ||
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@ -6005,7 +6014,10 @@ static bool isVZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult){
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return false;
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for (unsigned i = 0; i < M.size(); i += NumElts) {
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WhichResult = M[i] == 0 ? 0 : 1;
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if (M.size() == NumElts * 2)
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WhichResult = i / NumElts;
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else
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WhichResult = M[i] == 0 ? 0 : 1;
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unsigned Idx = WhichResult * NumElts / 2;
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for (unsigned j = 0; j < NumElts; j += 2) {
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if ((M[i+j] >= 0 && (unsigned) M[i+j] != Idx) ||
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@ -282,6 +282,25 @@ entry:
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ret <8 x i16> %0
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}
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; NOTE: The mask here looks like something that could be done with a vzip,
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; but which the current handling of two-result vzip can't do - thus ending up
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; as a vtrn.
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define <8 x i16> @vzip_lower_shufflemask_undef_rev(<4 x i16>* %A, <4 x i16>* %B) {
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; CHECK-LABEL: vzip_lower_shufflemask_undef_rev:
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; CHECK: @ BB#0: @ %entry
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; CHECK-NEXT: vldr d16, [r1]
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; CHECK-NEXT: vldr d19, [r0]
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; CHECK-NEXT: vtrn.16 d19, d16
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; CHECK-NEXT: vmov r0, r1, d18
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; CHECK-NEXT: vmov r2, r3, d19
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; CHECK-NEXT: mov pc, lr
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entry:
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%tmp1 = load <4 x i16>, <4 x i16>* %A
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%tmp2 = load <4 x i16>, <4 x i16>* %B
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%0 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 4, i32 undef, i32 undef>
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ret <8 x i16> %0
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}
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define <4 x i32> @vzip_lower_shufflemask_zeroed(<2 x i32>* %A) {
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; CHECK-LABEL: vzip_lower_shufflemask_zeroed:
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; CHECK: @ BB#0: @ %entry
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