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Fix the x86-64 side of PR2108 by adding a v2f64 version of
MOVZQI2PQIrr. This would be better handled as a dag combine (with the goal of eliminating the bitconvert) but I don't know how to do that safely. Thoughts welcome. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49463 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2305,6 +2305,16 @@ def MOVZQI2PQIrr : RPDI<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
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MOVL_shuffle_mask)))]>;
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MOVL_shuffle_mask)))]>;
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}
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}
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// Handle the v2f64 form of 'MOVZQI2PQIrr' for PR2108. FIXME: this would be
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// better written as a dag combine xform.
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let AddedComplexity = 15 in
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def : Pat<(v2f64 (vector_shuffle immAllZerosV_bc,
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(v2f64 (scalar_to_vector
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(f64 (bitconvert GR64:$src)))),
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MOVL_shuffle_mask)),
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(MOVZQI2PQIrr GR64:$src)>, Requires<[HasSSE3]>;
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let AddedComplexity = 20 in {
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let AddedComplexity = 20 in {
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def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
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def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
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"movd\t{$src, $dst|$dst, $src}",
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"movd\t{$src, $dst|$dst, $src}",
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13
test/CodeGen/X86/vec_shuffle-17.ll
Normal file
13
test/CodeGen/X86/vec_shuffle-17.ll
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@ -0,0 +1,13 @@
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; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi, %xmm0}
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; RUN: llvm-as < %s | llc -march=x86-64 | not grep xor
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; PR2108
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define <2 x i64> @doload64(i64 %x) nounwind {
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entry:
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%tmp717 = bitcast i64 %x to double ; <double> [#uses=1]
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%tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0 ; <<2 x double>> [#uses=1]
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%tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1 ; <<2 x double>> [#uses=1]
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%tmp11 = bitcast <2 x double> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp11
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}
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