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The coalescer doesn't need LiveVariables now that we have register use iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51790 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,7 +17,6 @@
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#include "VirtRegMap.h"
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#include "VirtRegMap.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/Value.h"
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#include "llvm/Value.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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@ -66,7 +65,6 @@ void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreservedID(MachineDominatorsID);
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AU.addPreservedID(MachineDominatorsID);
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AU.addPreservedID(PHIEliminationID);
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AU.addPreservedID(PHIEliminationID);
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AU.addPreservedID(TwoAddressInstructionPassID);
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AU.addPreservedID(TwoAddressInstructionPassID);
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AU.addRequired<LiveVariables>();
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AU.addRequired<LiveIntervals>();
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AU.addRequired<LiveIntervals>();
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AU.addRequired<MachineLoopInfo>();
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AU.addRequired<MachineLoopInfo>();
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MachineFunctionPass::getAnalysisUsage(AU);
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MachineFunctionPass::getAnalysisUsage(AU);
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@ -967,10 +965,10 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// if this will cause a high use density interval to target a smaller
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// if this will cause a high use density interval to target a smaller
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// set of registers.
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// set of registers.
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if (SmallRegSize > Threshold || LargeRegSize > Threshold) {
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if (SmallRegSize > Threshold || LargeRegSize > Threshold) {
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LiveVariables::VarInfo &svi = lv_->getVarInfo(LargeReg);
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if ((float)std::distance(mri_->use_begin(SmallReg),
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LiveVariables::VarInfo &dvi = lv_->getVarInfo(SmallReg);
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mri_->use_end()) / SmallRegSize <
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if ((float)dvi.NumUses / SmallRegSize <
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(float)std::distance(mri_->use_begin(LargeReg),
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(float)svi.NumUses / LargeRegSize) {
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mri_->use_end()) / LargeRegSize) {
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Again = true; // May be possible to coalesce later.
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Again = true; // May be possible to coalesce later.
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return false;
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return false;
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}
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}
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@ -1026,9 +1024,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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// do not join them, instead mark the physical register as its allocation
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// do not join them, instead mark the physical register as its allocation
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// preference.
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// preference.
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unsigned Length = JoinVInt.getSize() / InstrSlots::NUM;
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unsigned Length = JoinVInt.getSize() / InstrSlots::NUM;
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LiveVariables::VarInfo &vi = lv_->getVarInfo(JoinVReg);
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if (Length > Threshold &&
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if (Length > Threshold &&
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(((float)vi.NumUses / Length) < (1.0 / Threshold))) {
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(((float)std::distance(mri_->use_begin(JoinVReg),
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mri_->use_end()) / Length) < (1.0 / Threshold))) {
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JoinVInt.preference = JoinPReg;
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JoinVInt.preference = JoinPReg;
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++numAborts;
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++numAborts;
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DOUT << "\tMay tie down a physical register, abort!\n";
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DOUT << "\tMay tie down a physical register, abort!\n";
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@ -1111,11 +1109,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS)
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for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS)
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li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt,
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li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt,
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li_->getVNInfoAllocator());
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li_->getVNInfoAllocator());
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} else {
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// Merge use info if the destination is a virtual register.
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LiveVariables::VarInfo& dVI = lv_->getVarInfo(DstReg);
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LiveVariables::VarInfo& sVI = lv_->getVarInfo(SrcReg);
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dVI.NumUses += sVI.NumUses;
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}
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}
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// If this is a EXTRACT_SUBREG, make sure the result of coalescing is the
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// If this is a EXTRACT_SUBREG, make sure the result of coalescing is the
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@ -2011,7 +2004,6 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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tri_ = tm_->getRegisterInfo();
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tri_ = tm_->getRegisterInfo();
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tii_ = tm_->getInstrInfo();
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tii_ = tm_->getInstrInfo();
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li_ = &getAnalysis<LiveIntervals>();
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li_ = &getAnalysis<LiveIntervals>();
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lv_ = &getAnalysis<LiveVariables>();
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loopInfo = &getAnalysis<MachineLoopInfo>();
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loopInfo = &getAnalysis<MachineLoopInfo>();
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DOUT << "********** SIMPLE REGISTER COALESCING **********\n"
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DOUT << "********** SIMPLE REGISTER COALESCING **********\n"
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@ -83,7 +83,6 @@ namespace llvm {
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const TargetRegisterInfo* tri_;
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const TargetRegisterInfo* tri_;
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const TargetInstrInfo* tii_;
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const TargetInstrInfo* tii_;
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LiveIntervals *li_;
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LiveIntervals *li_;
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LiveVariables *lv_;
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const MachineLoopInfo* loopInfo;
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const MachineLoopInfo* loopInfo;
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BitVector allocatableRegs_;
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BitVector allocatableRegs_;
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