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Add a spiller option to llc. A simple spiller will come soon. When we get CFG in the machine code represenation a global spiller will also be possible. Also document the linear scan register allocator but mark it as experimental for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12062 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -150,6 +150,19 @@ OPTIONS
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<di> local
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<dd>Local register allocator</dd>
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<di> linearscan
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<dd>Linear scan global register allocator (experimental)</dd>
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<li>-spiller=<sp>
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<br>
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Specify the spiller to use for register allocators that support it.
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Currently this option is used by the linear scan register
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allocator. The default is <i>local</i>.
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Valid spillers are:
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<dl compact>
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<di> local
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<dd>Local spiller</dd>
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</dl>
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<p>
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@ -26,7 +26,7 @@ namespace {
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cl::Prefix,
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cl::values(clEnumVal(simple, " simple register allocator"),
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clEnumVal(local, " local register allocator"),
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clEnumVal(linearscan, " linear-scan global register allocator"),
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clEnumVal(linearscan, " linear scan register allocator (experimental)"),
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0),
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cl::init(local));
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}
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@ -41,6 +41,7 @@ namespace {
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std::auto_ptr<PhysRegTracker> prt_;
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std::auto_ptr<VirtRegMap> vrm_;
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std::auto_ptr<Spiller> spiller_;
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typedef std::vector<float> SpillWeights;
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SpillWeights spillWeights_;
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@ -147,12 +148,13 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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li_ = &getAnalysis<LiveIntervals>();
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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initIntervalSets(li_->getIntervals());
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linearScan();
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eliminateVirtRegs(*mf_, *vrm_);
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spiller_->runOnMachineFunction(*mf_, *vrm_);
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return true;
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}
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@ -22,9 +22,10 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "Support/Statistic.h"
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#include "Support/CommandLine.h"
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#include "Support/Debug.h"
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#include "Support/DenseMap.h"
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#include "Support/Statistic.h"
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#include "Support/STLExtras.h"
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#include <iostream>
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@ -35,6 +36,15 @@ namespace {
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Statistic<> numStores("spiller", "Number of stores added");
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Statistic<> numLoads ("spiller", "Number of loads added");
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enum SpillerName { local };
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cl::opt<SpillerName>
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SpillerOpt("spiller",
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cl::desc("Spiller to use: (default: local)"),
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cl::Prefix,
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cl::values(clEnumVal(local, " local spiller"),
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0),
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cl::init(local));
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}
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int VirtRegMap::assignVirt2StackSlot(unsigned virtReg)
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@ -88,41 +98,44 @@ std::ostream& llvm::operator<<(std::ostream& os, const VirtRegMap& vrm)
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return std::cerr << '\n';
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}
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Spiller::~Spiller()
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{
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}
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namespace {
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class Spiller {
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class LocalSpiller : public Spiller {
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typedef std::vector<unsigned> Phys2VirtMap;
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typedef std::vector<bool> PhysFlag;
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typedef DenseMap<MachineInstr*, VirtReg2IndexFunctor> Virt2MI;
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MachineFunction& mf_;
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const TargetMachine& tm_;
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const TargetInstrInfo& tii_;
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const MRegisterInfo& mri_;
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const VirtRegMap& vrm_;
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MachineFunction* mf_;
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const TargetMachine* tm_;
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const TargetInstrInfo* tii_;
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const MRegisterInfo* mri_;
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const VirtRegMap* vrm_;
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Phys2VirtMap p2vMap_;
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PhysFlag dirty_;
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Virt2MI lastDef_;
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public:
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Spiller(MachineFunction& mf, const VirtRegMap& vrm)
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: mf_(mf),
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tm_(mf_.getTarget()),
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tii_(tm_.getInstrInfo()),
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mri_(*tm_.getRegisterInfo()),
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vrm_(vrm),
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p2vMap_(mri_.getNumRegs(), 0),
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dirty_(mri_.getNumRegs(), false),
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lastDef_() {
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bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) {
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mf_ = &mf;
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tm_ = &mf_->getTarget();
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tii_ = &tm_->getInstrInfo();
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mri_ = tm_->getRegisterInfo();
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vrm_ = &vrm;
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p2vMap_.assign(mri_->getNumRegs(), 0);
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dirty_.assign(mri_->getNumRegs(), false);
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DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< mf_.getFunction()->getName() << '\n');
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}
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<< mf_->getFunction()->getName() << '\n');
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void eliminateVirtRegs() {
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for (MachineFunction::iterator mbbi = mf_.begin(),
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mbbe = mf_.end(); mbbi != mbbe; ++mbbi) {
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lastDef_.grow(mf_.getSSARegMap()->getLastVirtReg());
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for (MachineFunction::iterator mbbi = mf_->begin(),
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mbbe = mf_->end(); mbbi != mbbe; ++mbbi) {
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lastDef_.grow(mf_->getSSARegMap()->getLastVirtReg());
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DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
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eliminateVirtRegsInMbb(*mbbi);
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// clear map, dirty flag and last ref
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@ -130,6 +143,7 @@ namespace {
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dirty_.assign(dirty_.size(), false);
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lastDef_.clear();
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}
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return true;
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}
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private:
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@ -137,21 +151,21 @@ namespace {
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MachineBasicBlock::iterator mii,
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unsigned physReg) {
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unsigned virtReg = p2vMap_[physReg];
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if (dirty_[physReg] && vrm_.hasStackSlot(virtReg)) {
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if (dirty_[physReg] && vrm_->hasStackSlot(virtReg)) {
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assert(lastDef_[virtReg] && "virtual register is mapped "
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"to a register and but was not defined!");
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MachineBasicBlock::iterator lastDef = lastDef_[virtReg];
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MachineBasicBlock::iterator nextLastRef = next(lastDef);
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mri_.storeRegToStackSlot(*lastDef->getParent(),
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mri_->storeRegToStackSlot(*lastDef->getParent(),
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nextLastRef,
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physReg,
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vrm_.getStackSlot(virtReg),
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mri_.getRegClass(physReg));
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vrm_->getStackSlot(virtReg),
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mri_->getRegClass(physReg));
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++numStores;
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DEBUG(std::cerr << "added: ";
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prior(nextLastRef)->print(std::cerr, tm_);
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prior(nextLastRef)->print(std::cerr, *tm_);
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std::cerr << "after: ";
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lastDef->print(std::cerr, tm_));
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lastDef->print(std::cerr, *tm_));
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lastDef_[virtReg] = 0;
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}
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p2vMap_[physReg] = 0;
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@ -162,7 +176,7 @@ namespace {
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MachineBasicBlock::iterator mii,
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unsigned physReg) {
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vacateJustPhysReg(mbb, mii, physReg);
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for (const unsigned* as = mri_.getAliasSet(physReg); *as; ++as)
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for (const unsigned* as = mri_->getAliasSet(physReg); *as; ++as)
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vacateJustPhysReg(mbb, mii, *as);
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}
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@ -175,13 +189,13 @@ namespace {
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vacatePhysReg(mbb, mii, physReg);
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p2vMap_[physReg] = virtReg;
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// load if necessary
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if (vrm_.hasStackSlot(virtReg)) {
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mri_.loadRegFromStackSlot(mbb, mii, physReg,
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vrm_.getStackSlot(virtReg),
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mri_.getRegClass(physReg));
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if (vrm_->hasStackSlot(virtReg)) {
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mri_->loadRegFromStackSlot(mbb, mii, physReg,
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vrm_->getStackSlot(virtReg),
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mri_->getRegClass(physReg));
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++numLoads;
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DEBUG(std::cerr << "added: ";
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prior(mii)->print(std::cerr,tm_));
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prior(mii)->print(std::cerr, *tm_));
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lastDef_[virtReg] = mii;
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}
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}
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@ -208,8 +222,8 @@ namespace {
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// we clear all physical registers that may contain
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// the value of the spilled virtual register
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VirtRegMap::MI2VirtMap::const_iterator i, e;
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for (tie(i, e) = vrm_.getFoldedVirts(mii); i != e; ++i) {
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unsigned physReg = vrm_.getPhys(i->second);
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for (tie(i, e) = vrm_->getFoldedVirts(mii); i != e; ++i) {
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unsigned physReg = vrm_->getPhys(i->second);
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if (physReg) vacateJustPhysReg(mbb, mii, physReg);
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}
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@ -219,7 +233,7 @@ namespace {
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if (op.isRegister() && op.getReg() && op.isUse() &&
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MRegisterInfo::isVirtualRegister(op.getReg())) {
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unsigned virtReg = op.getReg();
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unsigned physReg = vrm_.getPhys(virtReg);
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unsigned physReg = vrm_->getPhys(virtReg);
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handleUse(mbb, mii, virtReg, physReg);
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mii->SetMachineOperandReg(i, physReg);
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// mark as dirty if this is def&use
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@ -231,7 +245,7 @@ namespace {
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}
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// spill implicit defs
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const TargetInstrDescriptor& tid =tii_.get(mii->getOpcode());
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const TargetInstrDescriptor& tid = tii_->get(mii->getOpcode());
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for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
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vacatePhysReg(mbb, mii, *id);
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@ -243,13 +257,13 @@ namespace {
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if (MRegisterInfo::isPhysicalRegister(op.getReg()))
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vacatePhysReg(mbb, mii, op.getReg());
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else {
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unsigned physReg = vrm_.getPhys(op.getReg());
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unsigned physReg = vrm_->getPhys(op.getReg());
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handleDef(mbb, mii, op.getReg(), physReg);
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mii->SetMachineOperandReg(i, physReg);
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}
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}
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DEBUG(std::cerr << '\t'; mii->print(std::cerr, tm_));
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DEBUG(std::cerr << '\t'; mii->print(std::cerr, *tm_));
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}
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for (unsigned i = 1, e = p2vMap_.size(); i != e; ++i)
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@ -259,8 +273,13 @@ namespace {
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};
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}
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void llvm::eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm)
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llvm::Spiller* llvm::createSpiller()
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{
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Spiller(mf, vrm).eliminateVirtRegs();
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switch (SpillerOpt) {
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default:
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std::cerr << "no spiller selected";
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abort();
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case local:
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return new LocalSpiller();
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}
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}
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std::ostream& operator<<(std::ostream& os, const VirtRegMap& li);
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void eliminateVirtRegs(MachineFunction& mf, const VirtRegMap& vrm);
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struct Spiller {
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virtual ~Spiller();
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virtual bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap& vrm) = 0;
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};
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Spiller* createSpiller();
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} // End llvm namespace
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