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Several sundry bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1890 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -91,16 +91,16 @@ public:
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/*ctor*/ UltraSparcInstrInfo(const TargetMachine& tgt);
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//
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// All immediate constants are in position 0 except the
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// All immediate constants are in position 1 except the
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// store instructions.
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//
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virtual int getImmmedConstantPos(MachineOpCode opCode) const {
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virtual int getImmedConstantPos(MachineOpCode opCode) const {
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bool ignore;
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if (this->maxImmedConstant(opCode, ignore) != 0)
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{
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assert(! this->isStore((MachineOpCode) STB - 1)); // first store is STB
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assert(! this->isStore((MachineOpCode) STD + 1)); // last store is STD
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return (opCode >= STB || opCode <= STD)? 2 : 1;
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return (opCode >= STB && opCode <= STD)? 2 : 1;
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}
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else
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return -1;
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@ -126,7 +126,8 @@ public:
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// returned in `minstrVec'. Any temporary registers (TmpInstruction)
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// created are returned in `tempVec'.
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//
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virtual void CreateCodeToLoadConst(Value* val,
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virtual void CreateCodeToLoadConst(Method* method,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& minstrVec,
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std::vector<TmpInstruction*>& tmp) const;
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@ -157,11 +158,11 @@ public:
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TargetMachine& target) const;
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// create copy instruction(s)
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virtual void
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CreateCopyInstructionsByType(const TargetMachine& target,
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Value* src,
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Instruction* dest,
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std::vector<MachineInstr*>& minstr) const;
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virtual void CreateCopyInstructionsByType(const TargetMachine& target,
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Method* method,
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Value* src,
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Instruction* dest,
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std::vector<MachineInstr*>& minstr) const;
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};
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@ -296,12 +297,11 @@ public:
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return *UltraSparcInfo;
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}
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// To find the register class of a Value
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// To find the register class used for a specified Type
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//
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inline unsigned getRegClassIDOfValue(const Value *Val,
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bool isCCReg = false) const {
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Type::PrimitiveID ty = Val->getType()->getPrimitiveID();
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inline unsigned getRegClassIDOfType(const Type *type,
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bool isCCReg = false) const {
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Type::PrimitiveID ty = type->getPrimitiveID();
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unsigned res;
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if ((ty && ty <= Type::LongTyID) || (ty == Type::LabelTyID) ||
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@ -321,6 +321,14 @@ public:
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return res;
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}
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// To find the register class of a Value
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//
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inline unsigned getRegClassIDOfValue(const Value *Val,
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bool isCCReg = false) const {
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return getRegClassIDOfType(Val->getType(), isCCReg);
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}
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// getZeroRegNum - returns the register that contains always zero this is the
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// unified register number
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@ -382,7 +390,7 @@ public:
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else if( RegClassID == FloatCCRegClassID && reg < 4)
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return reg + 32 + 64; // 32 int, 64 float
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else if( RegClassID == IntCCRegClassID )
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return 4+ 32 + 64; // only int cc reg
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return reg + 4+ 32 + 64; // only int cc reg
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else if (reg==InvalidRegNum)
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return InvalidRegNum;
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else
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