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[msan] Handle x86 vector pack intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210020 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1944,6 +1944,28 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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setOriginForNaryOp(I);
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setOriginForNaryOp(I);
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}
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}
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// \brief Instrument vector shift instrinsic.
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//
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// This function instruments intrinsics like x86_mmx_packsswb, that
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// packs elements of 2 input vectors into half as much bits with saturation.
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// Shadow is propagated with the same intrinsic applied to
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// sext(Sa != zeroinitializer), sext(Sb != zeroinitializer).
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void handleVectorPackIntrinsic(IntrinsicInst &I) {
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assert(I.getNumArgOperands() == 2);
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IRBuilder<> IRB(&I);
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Value *S1 = getShadow(&I, 0);
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Value *S2 = getShadow(&I, 1);
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Type *T = S1->getType();
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Value *S1_ext = IRB.CreateSExt(
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IRB.CreateICmpNE(S1, llvm::Constant::getNullValue(T)), T);
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Value *S2_ext = IRB.CreateSExt(
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IRB.CreateICmpNE(S2, llvm::Constant::getNullValue(T)), T);
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Value *S = IRB.CreateCall2(I.getCalledValue(), S1_ext, S2_ext,
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"_msprop_vector_pack");
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setShadow(&I, S);
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setOriginForNaryOp(I);
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}
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void visitIntrinsicInst(IntrinsicInst &I) {
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void visitIntrinsicInst(IntrinsicInst &I) {
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switch (I.getIntrinsicID()) {
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switch (I.getIntrinsicID()) {
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case llvm::Intrinsic::bswap:
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case llvm::Intrinsic::bswap:
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@ -2060,6 +2082,20 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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// case llvm::Intrinsic::x86_sse2_psll_dq_bs:
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// case llvm::Intrinsic::x86_sse2_psll_dq_bs:
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// case llvm::Intrinsic::x86_sse2_psrl_dq_bs:
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// case llvm::Intrinsic::x86_sse2_psrl_dq_bs:
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case llvm::Intrinsic::x86_sse2_packsswb_128:
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case llvm::Intrinsic::x86_sse2_packssdw_128:
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case llvm::Intrinsic::x86_sse2_packuswb_128:
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case llvm::Intrinsic::x86_sse41_packusdw:
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case llvm::Intrinsic::x86_avx2_packsswb:
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case llvm::Intrinsic::x86_avx2_packssdw:
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case llvm::Intrinsic::x86_avx2_packuswb:
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case llvm::Intrinsic::x86_avx2_packusdw:
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case llvm::Intrinsic::x86_mmx_packsswb:
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case llvm::Intrinsic::x86_mmx_packssdw:
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case llvm::Intrinsic::x86_mmx_packuswb:
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handleVectorPackIntrinsic(I);
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break;
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default:
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default:
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if (!handleUnknownIntrinsic(I))
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if (!handleUnknownIntrinsic(I))
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visitInstruction(I);
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visitInstruction(I);
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38
test/Instrumentation/MemorySanitizer/vector_pack.ll
Normal file
38
test/Instrumentation/MemorySanitizer/vector_pack.ll
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@ -0,0 +1,38 @@
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; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind readnone
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declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a, <16 x i16> %b) nounwind readnone
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define <8 x i16> @Test_packssdw_128(<4 x i32> %a, <4 x i32> %b) sanitize_memory {
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entry:
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%c = tail call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a, <4 x i32> %b) nounwind
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ret <8 x i16> %c
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}
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; CHECK-LABEL: @Test_packssdw_128(
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; CHECK-DAG: icmp ne <4 x i32> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <4 x i1> {{.*}} to <4 x i32>
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; CHECK-DAG: icmp ne <4 x i32> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <4 x i1> {{.*}} to <4 x i32>
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; CHECK-DAG: call <8 x i16> @llvm.x86.sse2.packssdw.128(
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; CHECK-DAG: call <8 x i16> @llvm.x86.sse2.packssdw.128(
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; CHECK: ret <8 x i16>
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define <32 x i8> @Test_avx_packuswb(<16 x i16> %a, <16 x i16> %b) sanitize_memory {
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entry:
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%c = tail call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a, <16 x i16> %b) nounwind
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ret <32 x i8> %c
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}
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; CHECK-LABEL: @Test_avx_packuswb(
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; CHECK-DAG: icmp ne <16 x i16> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <16 x i1> {{.*}} to <16 x i16>
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; CHECK-DAG: icmp ne <16 x i16> {{.*}}, zeroinitializer
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; CHECK-DAG: sext <16 x i1> {{.*}} to <16 x i16>
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; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packuswb(
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; CHECK-DAG: call <32 x i8> @llvm.x86.avx2.packuswb(
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; CHECK: ret <32 x i8>
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