diff --git a/test/CodeGen/X86/avx512bw-arith.ll b/test/CodeGen/X86/avx512bw-arith.ll
index 52ebf27b6b7..62ed0657682 100644
--- a/test/CodeGen/X86/avx512bw-arith.ll
+++ b/test/CodeGen/X86/avx512bw-arith.ll
@@ -1,63 +1,74 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw| FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s
 
-; CHECK-LABEL: vpaddb512_test
-; CHECK: vpaddb %zmm{{.*}}
-; CHECK: ret
 define <64 x i8> @vpaddb512_test(<64 x i8> %i, <64 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpaddb512_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %x = add <64 x i8> %i, %j
   ret <64 x i8> %x
 }
 
-; CHECK-LABEL: vpaddb512_fold_test
-; CHECK: vpaddb (%rdi), %zmm{{.*}}
-; CHECK: ret
 define <64 x i8> @vpaddb512_fold_test(<64 x i8> %i, <64 x i8>* %j) nounwind {
+; CHECK-LABEL: vpaddb512_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb (%rdi), %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %tmp = load <64 x i8>, <64 x i8>* %j, align 4
   %x = add <64 x i8> %i, %tmp
   ret <64 x i8> %x
 }
 
-; CHECK-LABEL: vpaddw512_test
-; CHECK: vpaddw %zmm{{.*}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_test(<32 x i16> %i, <32 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpaddw512_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %x = add <32 x i16> %i, %j
   ret <32 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw512_fold_test
-; CHECK: vpaddw (%rdi), %zmm{{.*}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_fold_test(<32 x i16> %i, <32 x i16>* %j) nounwind {
+; CHECK-LABEL: vpaddw512_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw (%rdi), %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %tmp = load <32 x i16>, <32 x i16>* %j, align 4
   %x = add <32 x i16> %i, %tmp
   ret <32 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw512_mask_test
-; CHECK: vpaddw %zmm{{.*%k[1-7].*}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_mask_test(<32 x i16> %i, <32 x i16> %j, <32 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw512_mask_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %zmm2, %zmm2, %k1
+; CHECK-NEXT:    vpaddw %zmm1, %zmm0, %zmm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <32 x i16> %mask1, zeroinitializer
   %x = add <32 x i16> %i, %j
   %r = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %i
   ret <32 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw512_maskz_test
-; CHECK: vpaddw %zmm{{.*{%k[1-7]} {z}.*}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_maskz_test(<32 x i16> %i, <32 x i16> %j, <32 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw512_maskz_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %zmm2, %zmm2, %k1
+; CHECK-NEXT:    vpaddw %zmm1, %zmm0, %zmm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <32 x i16> %mask1, zeroinitializer
   %x = add <32 x i16> %i, %j
   %r = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> zeroinitializer
   ret <32 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw512_mask_fold_test
-; CHECK: vpaddw (%rdi), %zmm{{.*%k[1-7]}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_mask_fold_test(<32 x i16> %i, <32 x i16>* %j.ptr, <32 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw512_mask_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %zmm1, %zmm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %zmm0, %zmm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <32 x i16> %mask1, zeroinitializer
   %j = load <32 x i16>, <32 x i16>* %j.ptr
   %x = add <32 x i16> %i, %j
@@ -65,10 +76,12 @@ define <32 x i16> @vpaddw512_mask_fold_test(<32 x i16> %i, <32 x i16>* %j.ptr, <
   ret <32 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw512_maskz_fold_test
-; CHECK: vpaddw (%rdi), %zmm{{.*{%k[1-7]} {z}}}
-; CHECK: ret
 define <32 x i16> @vpaddw512_maskz_fold_test(<32 x i16> %i, <32 x i16>* %j.ptr, <32 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw512_maskz_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %zmm1, %zmm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %zmm0, %zmm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <32 x i16> %mask1, zeroinitializer
   %j = load <32 x i16>, <32 x i16>* %j.ptr
   %x = add <32 x i16> %i, %j
@@ -76,26 +89,29 @@ define <32 x i16> @vpaddw512_maskz_fold_test(<32 x i16> %i, <32 x i16>* %j.ptr,
   ret <32 x i16> %r
 }
 
-; CHECK-LABEL: vpsubb512_test
-; CHECK: vpsubb %zmm{{.*}}
-; CHECK: ret
 define <64 x i8> @vpsubb512_test(<64 x i8> %i, <64 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpsubb512_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubb %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %x = sub <64 x i8> %i, %j
   ret <64 x i8> %x
 }
 
-; CHECK-LABEL: vpsubw512_test
-; CHECK: vpsubw %zmm{{.*}}
-; CHECK: ret
 define <32 x i16> @vpsubw512_test(<32 x i16> %i, <32 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpsubw512_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubw %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %x = sub <32 x i16> %i, %j
   ret <32 x i16> %x
 }
 
-; CHECK-LABEL: vpmullw512_test
-; CHECK: vpmullw %zmm{{.*}}
-; CHECK: ret
 define <32 x i16> @vpmullw512_test(<32 x i16> %i, <32 x i16> %j) {
+; CHECK-LABEL: vpmullw512_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpmullw %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    retq
   %x = mul <32 x i16> %i, %j
   ret <32 x i16> %x
 }
diff --git a/test/CodeGen/X86/avx512bwvl-arith.ll b/test/CodeGen/X86/avx512bwvl-arith.ll
index c0650e17610..900ec4e17fa 100644
--- a/test/CodeGen/X86/avx512bwvl-arith.ll
+++ b/test/CodeGen/X86/avx512bwvl-arith.ll
@@ -1,65 +1,76 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl| FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s
 
 ; 256-bit
 
-; CHECK-LABEL: vpaddb256_test
-; CHECK: vpaddb %ymm{{.*}}
-; CHECK: ret
 define <32 x i8> @vpaddb256_test(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpaddb256_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %x = add <32 x i8> %i, %j
   ret <32 x i8> %x
 }
 
-; CHECK-LABEL: vpaddb256_fold_test
-; CHECK: vpaddb (%rdi), %ymm{{.*}}
-; CHECK: ret
 define <32 x i8> @vpaddb256_fold_test(<32 x i8> %i, <32 x i8>* %j) nounwind {
+; CHECK-LABEL: vpaddb256_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb (%rdi), %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %tmp = load <32 x i8>, <32 x i8>* %j, align 4
   %x = add <32 x i8> %i, %tmp
   ret <32 x i8> %x
 }
 
-; CHECK-LABEL: vpaddw256_test
-; CHECK: vpaddw %ymm{{.*}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_test(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpaddw256_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %x = add <16 x i16> %i, %j
   ret <16 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw256_fold_test
-; CHECK: vpaddw (%rdi), %ymm{{.*}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_fold_test(<16 x i16> %i, <16 x i16>* %j) nounwind {
+; CHECK-LABEL: vpaddw256_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw (%rdi), %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %tmp = load <16 x i16>, <16 x i16>* %j, align 4
   %x = add <16 x i16> %i, %tmp
   ret <16 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw256_mask_test
-; CHECK: vpaddw %ymm{{.*%k[1-7].*}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_mask_test(<16 x i16> %i, <16 x i16> %j, <16 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw256_mask_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %ymm2, %ymm2, %k1
+; CHECK-NEXT:    vpaddw %ymm1, %ymm0, %ymm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <16 x i16> %mask1, zeroinitializer
   %x = add <16 x i16> %i, %j
   %r = select <16 x i1> %mask, <16 x i16> %x, <16 x i16> %i
   ret <16 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw256_maskz_test
-; CHECK: vpaddw %ymm{{.*{%k[1-7]} {z}.*}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_maskz_test(<16 x i16> %i, <16 x i16> %j, <16 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw256_maskz_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %ymm2, %ymm2, %k1
+; CHECK-NEXT:    vpaddw %ymm1, %ymm0, %ymm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <16 x i16> %mask1, zeroinitializer
   %x = add <16 x i16> %i, %j
   %r = select <16 x i1> %mask, <16 x i16> %x, <16 x i16> zeroinitializer
   ret <16 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw256_mask_fold_test
-; CHECK: vpaddw (%rdi), %ymm{{.*%k[1-7]}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_mask_fold_test(<16 x i16> %i, <16 x i16>* %j.ptr, <16 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw256_mask_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %ymm1, %ymm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %ymm0, %ymm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <16 x i16> %mask1, zeroinitializer
   %j = load <16 x i16>, <16 x i16>* %j.ptr
   %x = add <16 x i16> %i, %j
@@ -67,10 +78,12 @@ define <16 x i16> @vpaddw256_mask_fold_test(<16 x i16> %i, <16 x i16>* %j.ptr, <
   ret <16 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw256_maskz_fold_test
-; CHECK: vpaddw (%rdi), %ymm{{.*{%k[1-7]} {z}}}
-; CHECK: ret
 define <16 x i16> @vpaddw256_maskz_fold_test(<16 x i16> %i, <16 x i16>* %j.ptr, <16 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw256_maskz_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %ymm1, %ymm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %ymm0, %ymm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <16 x i16> %mask1, zeroinitializer
   %j = load <16 x i16>, <16 x i16>* %j.ptr
   %x = add <16 x i16> %i, %j
@@ -78,90 +91,103 @@ define <16 x i16> @vpaddw256_maskz_fold_test(<16 x i16> %i, <16 x i16>* %j.ptr,
   ret <16 x i16> %r
 }
 
-; CHECK-LABEL: vpsubb256_test
-; CHECK: vpsubb %ymm{{.*}}
-; CHECK: ret
 define <32 x i8> @vpsubb256_test(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpsubb256_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubb %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %x = sub <32 x i8> %i, %j
   ret <32 x i8> %x
 }
 
-; CHECK-LABEL: vpsubw256_test
-; CHECK: vpsubw %ymm{{.*}}
-; CHECK: ret
 define <16 x i16> @vpsubw256_test(<16 x i16> %i, <16 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpsubw256_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %x = sub <16 x i16> %i, %j
   ret <16 x i16> %x
 }
 
-; CHECK-LABEL: vpmullw256_test
-; CHECK: vpmullw %ymm{{.*}}
-; CHECK: ret
 define <16 x i16> @vpmullw256_test(<16 x i16> %i, <16 x i16> %j) {
+; CHECK-LABEL: vpmullw256_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpmullw %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    retq
   %x = mul <16 x i16> %i, %j
   ret <16 x i16> %x
 }
 
 ; 128-bit
 
-; CHECK-LABEL: vpaddb128_test
-; CHECK: vpaddb %xmm{{.*}}
-; CHECK: ret
 define <16 x i8> @vpaddb128_test(<16 x i8> %i, <16 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpaddb128_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %x = add <16 x i8> %i, %j
   ret <16 x i8> %x
 }
 
-; CHECK-LABEL: vpaddb128_fold_test
-; CHECK: vpaddb (%rdi), %xmm{{.*}}
-; CHECK: ret
 define <16 x i8> @vpaddb128_fold_test(<16 x i8> %i, <16 x i8>* %j) nounwind {
+; CHECK-LABEL: vpaddb128_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddb (%rdi), %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %tmp = load <16 x i8>, <16 x i8>* %j, align 4
   %x = add <16 x i8> %i, %tmp
   ret <16 x i8> %x
 }
 
-; CHECK-LABEL: vpaddw128_test
-; CHECK: vpaddw %xmm{{.*}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_test(<8 x i16> %i, <8 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpaddw128_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %x = add <8 x i16> %i, %j
   ret <8 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw128_fold_test
-; CHECK: vpaddw (%rdi), %xmm{{.*}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_fold_test(<8 x i16> %i, <8 x i16>* %j) nounwind {
+; CHECK-LABEL: vpaddw128_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpaddw (%rdi), %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %tmp = load <8 x i16>, <8 x i16>* %j, align 4
   %x = add <8 x i16> %i, %tmp
   ret <8 x i16> %x
 }
 
-; CHECK-LABEL: vpaddw128_mask_test
-; CHECK: vpaddw %xmm{{.*%k[1-7].*}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_mask_test(<8 x i16> %i, <8 x i16> %j, <8 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw128_mask_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %xmm2, %xmm2, %k1
+; CHECK-NEXT:    vpaddw %xmm1, %xmm0, %xmm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <8 x i16> %mask1, zeroinitializer
   %x = add <8 x i16> %i, %j
   %r = select <8 x i1> %mask, <8 x i16> %x, <8 x i16> %i
   ret <8 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw128_maskz_test
-; CHECK: vpaddw %xmm{{.*{%k[1-7]} {z}.*}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_maskz_test(<8 x i16> %i, <8 x i16> %j, <8 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw128_maskz_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %xmm2, %xmm2, %k1
+; CHECK-NEXT:    vpaddw %xmm1, %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <8 x i16> %mask1, zeroinitializer
   %x = add <8 x i16> %i, %j
   %r = select <8 x i1> %mask, <8 x i16> %x, <8 x i16> zeroinitializer
   ret <8 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw128_mask_fold_test
-; CHECK: vpaddw (%rdi), %xmm{{.*%k[1-7]}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_mask_fold_test(<8 x i16> %i, <8 x i16>* %j.ptr, <8 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw128_mask_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %xmm1, %xmm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %xmm0, %xmm0 {%k1}
+; CHECK-NEXT:    retq
   %mask = icmp ne <8 x i16> %mask1, zeroinitializer
   %j = load <8 x i16>, <8 x i16>* %j.ptr
   %x = add <8 x i16> %i, %j
@@ -169,10 +195,12 @@ define <8 x i16> @vpaddw128_mask_fold_test(<8 x i16> %i, <8 x i16>* %j.ptr, <8 x
   ret <8 x i16> %r
 }
 
-; CHECK-LABEL: vpaddw128_maskz_fold_test
-; CHECK: vpaddw (%rdi), %xmm{{.*{%k[1-7]} {z}}}
-; CHECK: ret
 define <8 x i16> @vpaddw128_maskz_fold_test(<8 x i16> %i, <8 x i16>* %j.ptr, <8 x i16> %mask1) nounwind readnone {
+; CHECK-LABEL: vpaddw128_maskz_fold_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vptestmw %xmm1, %xmm1, %k1
+; CHECK-NEXT:    vpaddw (%rdi), %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT:    retq
   %mask = icmp ne <8 x i16> %mask1, zeroinitializer
   %j = load <8 x i16>, <8 x i16>* %j.ptr
   %x = add <8 x i16> %i, %j
@@ -180,26 +208,29 @@ define <8 x i16> @vpaddw128_maskz_fold_test(<8 x i16> %i, <8 x i16>* %j.ptr, <8
   ret <8 x i16> %r
 }
 
-; CHECK-LABEL: vpsubb128_test
-; CHECK: vpsubb %xmm{{.*}}
-; CHECK: ret
 define <16 x i8> @vpsubb128_test(<16 x i8> %i, <16 x i8> %j) nounwind readnone {
+; CHECK-LABEL: vpsubb128_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubb %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %x = sub <16 x i8> %i, %j
   ret <16 x i8> %x
 }
 
-; CHECK-LABEL: vpsubw128_test
-; CHECK: vpsubw %xmm{{.*}}
-; CHECK: ret
 define <8 x i16> @vpsubw128_test(<8 x i16> %i, <8 x i16> %j) nounwind readnone {
+; CHECK-LABEL: vpsubw128_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpsubw %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %x = sub <8 x i16> %i, %j
   ret <8 x i16> %x
 }
 
-; CHECK-LABEL: vpmullw128_test
-; CHECK: vpmullw %xmm{{.*}}
-; CHECK: ret
 define <8 x i16> @vpmullw128_test(<8 x i16> %i, <8 x i16> %j) {
+; CHECK-LABEL: vpmullw128_test:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpmullw %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
   %x = mul <8 x i16> %i, %j
   ret <8 x i16> %x
 }