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Match live variable changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31762 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,6 +13,7 @@
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/BasicBlock.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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@ -26,6 +27,7 @@
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include <algorithm>
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#include <iostream>
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@ -309,7 +311,18 @@ void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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*AliasSet; ++AliasSet)
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if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
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PhysRegsUsed[*AliasSet] != -2) // If allocatable.
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if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
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if (PhysRegsUsed[*AliasSet] == 0) {
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// This must have been a dead def due to something like this:
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// %EAX :=
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// := op %AL
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// No more use of %EAX, %AH, etc.
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// %EAX isn't dead upon definition, but %AH is. However %AH isn't
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// an operand of definition MI so it's not marked as such.
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DEBUG(std::cerr << " Register " << RegInfo->getName(*AliasSet)
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<< " [%reg" << *AliasSet
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<< "] is never used, removing it frame live list\n");
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removePhysReg(*AliasSet);
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} else
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spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
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}
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}
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@ -512,6 +525,9 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MachineBasicBlock::iterator MII = MBB.begin();
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const TargetInstrInfo &TII = *TM->getInstrInfo();
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DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
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if (LBB) std::cerr << "\nStarting RegAlloc of BB: " << LBB->getName());
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// If this is the first basic block in the machine function, add live-in
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// registers as active.
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if (&MBB == &*MF->begin()) {
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@ -552,6 +568,13 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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MarkPhysRegRecentlyUsed(*ImplicitUses);
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}
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SmallVector<unsigned, 8> Kills;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand& MO = MI->getOperand(i);
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if (MO.isRegister() && MO.isKill())
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Kills.push_back(MO.getReg());
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}
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// Get the used operands into registers. This has the potential to spill
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// incoming values if we are out of registers. Note that we completely
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// ignore physical register uses here. We assume that if an explicit
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@ -561,18 +584,17 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
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MachineOperand& MO = MI->getOperand(i);
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// here we are looking for only used operands (never def&use)
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if (MO.isRegister() && !MO.isDef() && !MO.isImplicit() && MO.getReg() &&
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if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
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MRegisterInfo::isVirtualRegister(MO.getReg()))
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MI = reloadVirtReg(MBB, MI, i);
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}
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// If this instruction is the last user of anything in registers, kill the
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// If this instruction is the last user of this register, kill the
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// value, freeing the register being used, so it doesn't need to be
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// spilled to memory.
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//
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for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
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KE = LV->killed_end(MI); KI != KE; ++KI) {
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unsigned VirtReg = *KI;
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for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
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unsigned VirtReg = Kills[i];
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unsigned PhysReg = VirtReg;
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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// If the virtual register was never materialized into a register, it
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@ -589,6 +611,15 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
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<< "[%reg" << VirtReg <<"], removing it from live set\n");
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removePhysReg(PhysReg);
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for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
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*AliasSet; ++AliasSet) {
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if (PhysRegsUsed[*AliasSet] != -2) {
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DEBUG(std::cerr << " Last use of "
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<< RegInfo->getName(*AliasSet)
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<< "[%reg" << VirtReg <<"], removing it from live set\n");
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removePhysReg(*AliasSet);
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}
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}
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}
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}
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@ -602,7 +633,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
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PhysRegsEverUsed[Reg] = true;
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spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
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spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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PhysRegsUseOrder.push_back(Reg);
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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@ -642,6 +673,13 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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}
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}
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SmallVector<unsigned, 8> DeadDefs;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand& MO = MI->getOperand(i);
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if (MO.isRegister() && MO.isDead())
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DeadDefs.push_back(MO.getReg());
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}
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// Okay, we have allocated all of the source operands and spilled any values
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// that would be destroyed by defs of this instruction. Loop over the
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// explicit defs and assign them to a register, spilling incoming values if
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@ -666,9 +704,8 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// If this instruction defines any registers that are immediately dead,
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// kill them now.
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//
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for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
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KE = LV->dead_end(MI); KI != KE; ++KI) {
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unsigned VirtReg = *KI;
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for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
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unsigned VirtReg = DeadDefs[i];
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unsigned PhysReg = VirtReg;
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if (MRegisterInfo::isVirtualRegister(VirtReg)) {
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unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
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@ -685,6 +722,15 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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<< " [%reg" << VirtReg
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<< "] is never used, removing it frame live list\n");
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removePhysReg(PhysReg);
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for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
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*AliasSet; ++AliasSet) {
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if (PhysRegsUsed[*AliasSet] != -2) {
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DEBUG(std::cerr << " Register " << RegInfo->getName(*AliasSet)
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<< " [%reg" << *AliasSet
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<< "] is never used, removing it frame live list\n");
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removePhysReg(*AliasSet);
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}
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}
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}
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}
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