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[AArch64] Add ARMv8.2-A persistent memory instruction

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ARMv8.2-A adds the "dc cvap" instruction, which is a system instruction
that cleans caches to the point of persistence (for systems that have
persistent memory). It is a required part of ARMv8.2-A, so no additional
subtarget features are required.

Differential Revision: http://reviews.llvm.org/D15016



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254156 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Oliver Stannard 2015-11-26 15:28:47 +00:00
parent c9ad981477
commit df55505b87
5 changed files with 30 additions and 3 deletions
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7
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
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@ -2465,6 +2465,13 @@ bool AArch64AsmParser::parseSysAlias(StringRef Name, SMLoc NameLoc,
} else if (!Op.compare_lower("cisw")) {
// SYS #0, C7, C14, #2
SYS_ALIAS(0, 7, 14, 2);
} else if (!Op.compare_lower("cvap")) {
if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) {
// SYS #3, C7, C12, #1
SYS_ALIAS(3, 7, 12, 1);
} else {
return TokError("DC CVAP requires ARMv8.2a");
}
} else {
return TokError("invalid operand for DC instruction");
}

11
lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
View File

@ -55,7 +55,7 @@ void AArch64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
unsigned Opcode = MI->getOpcode();
if (Opcode == AArch64::SYSxt)
if (printSysAlias(MI, O)) {
if (printSysAlias(MI, STI, O)) {
printAnnotation(O, Annot);
return;
}
@ -674,7 +674,9 @@ void AArch64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
AArch64InstPrinter::printInst(MI, O, Annot, STI);
}
bool AArch64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) {
bool AArch64InstPrinter::printSysAlias(const MCInst *MI,
const MCSubtargetInfo &STI,
raw_ostream &O) {
#ifndef NDEBUG
unsigned Opcode = MI->getOpcode();
assert(Opcode == AArch64::SYSxt && "Invalid opcode for SYS alias!");
@ -729,6 +731,11 @@ bool AArch64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) {
if (Op1Val == 3 && Op2Val == 1)
Asm = "dc\tcvau";
break;
case 12:
if (Op1Val == 3 && Op2Val == 1 &&
(STI.getFeatureBits()[AArch64::HasV8_2aOps]))
Asm = "dc\tcvap";
break;
case 14:
if (Op1Val == 3 && Op2Val == 1)
Asm = "dc\tcivac";

3
lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h
View File

@ -48,7 +48,8 @@ public:
unsigned AltIdx = AArch64::NoRegAltName);
protected:
bool printSysAlias(const MCInst *MI, raw_ostream &O);
bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
raw_ostream &O);
// Operand printers
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O);

6
test/MC/AArch64/armv8.2a-persistent-memory.s Normal file
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@ -0,0 +1,6 @@
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.2a < %s | FileCheck %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-v8.2a < %s 2>&1 | FileCheck %s --check-prefix=ERROR
dc cvap, x7
// CHECK: dc cvap, x7 // encoding: [0x27,0x7c,0x0b,0xd5]
// ERROR: error: DC CVAP requires ARMv8.2a

6
test/MC/Disassembler/AArch64/armv8.2a-persistent-memory.txt Normal file
View File

@ -0,0 +1,6 @@
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.2a --disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck --check-prefix=NO_V82 %s
[0x27,0x7c,0x0b,0xd5]
# CHECK: dc cvap, x7
# NO_V82: sys #3, c7, c12, #1, x7