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adjust last patch per review feedback

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56194 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen 2008-09-14 01:44:36 +00:00
parent bfe2f407db
commit e009180f2b
2 changed files with 7 additions and 10 deletions
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11
include/llvm/CodeGen/MachineOperand.h
View File

@ -68,11 +68,9 @@ private:
/// This is only valid on definitions of registers.
bool IsDead : 1;
/// IsEarlyClobber flag - this is only valid for MO_Register operands in
/// an inline asm.
/// IsEarlyClobber - True if this operand is marked earlyclobber in an
/// inline asm. See gcc doc for description of earlyclobber.
/// IsEarlyClobber - True if this MO_Register operand is marked earlyclobber
/// in an inline asm. Flag is not valid for any other case. See gcc doc
/// for description of earlyclobber.
bool IsEarlyClobber : 1;
/// SubReg - Subregister number, only valid for MO_Register. A value of 0
@ -318,8 +316,7 @@ public:
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
bool isEarlyClobber = false);
bool isKill = false, bool isDead = false);
//===--------------------------------------------------------------------===//
// Construction methods.

6
lib/CodeGen/MachineInstr.cpp
View File

@ -104,11 +104,11 @@ void MachineOperand::ChangeToImmediate(int64_t ImmVal) {
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
bool isKill, bool isDead,
bool isEarlyClobber) {
bool isKill, bool isDead) {
// If this operand is already a register operand, use setReg to update the
// register's use/def lists.
if (isRegister()) {
assert(!isEarlyClobber());
setReg(Reg);
} else {
// Otherwise, change this to a register and set the reg#.
@ -127,7 +127,7 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
IsImp = isImp;
IsKill = isKill;
IsDead = isDead;
IsEarlyClobber = isEarlyClobber;
IsEarlyClobber = false;
SubReg = 0;
}