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[InstCombine] Don't aggressively replace xor with icmp

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For some cases, InstCombine replaces the sequence of xor/sub instruction
followed by cmp instruction into a single cmp instruction.

However, this replacement may result suboptimal result especially when
the xor/sub has more than one use, as discussed in
bug 26465 (https://llvm.org/bugs/show_bug.cgi?id=26465).

This patch make the replacement happen only when xor/sub has only one
use.

Differential Revision: http://reviews.llvm.org/D16915

Patch by Taewook Oh!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260695 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Majnemer 2016-02-12 18:12:38 +00:00
parent abf168408a
commit e049aa6ae3
2 changed files with 61 additions and 17 deletions
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37
lib/Transforms/InstCombine/InstCombineCompares.cpp
View File

@ -2212,27 +2212,30 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
}
break;
case Instruction::Xor:
// For the xor case, we can xor two constants together, eliminating
// the explicit xor.
if (Constant *BOC = dyn_cast<Constant>(BO->getOperand(1))) {
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
ConstantExpr::getXor(RHS, BOC));
} else if (RHSV == 0) {
// Replace ((xor A, B) != 0) with (A != B)
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
BO->getOperand(1));
if (BO->hasOneUse()) {
if (Constant *BOC = dyn_cast<Constant>(BO->getOperand(1))) {
// For the xor case, we can xor two constants together, eliminating
// the explicit xor.
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
ConstantExpr::getXor(RHS, BOC));
} else if (RHSV == 0) {
// Replace ((xor A, B) != 0) with (A != B)
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
BO->getOperand(1));
}
}
break;
case Instruction::Sub:
// Replace ((sub A, B) != C) with (B != A-C) if A & C are constants.
if (ConstantInt *BOp0C = dyn_cast<ConstantInt>(BO->getOperand(0))) {
if (BO->hasOneUse())
if (BO->hasOneUse()) {
if (ConstantInt *BOp0C = dyn_cast<ConstantInt>(BO->getOperand(0))) {
// Replace ((sub A, B) != C) with (B != A-C) if A & C are constants.
return new ICmpInst(ICI.getPredicate(), BO->getOperand(1),
ConstantExpr::getSub(BOp0C, RHS));
} else if (RHSV == 0) {
// Replace ((sub A, B) != 0) with (A != B)
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
BO->getOperand(1));
ConstantExpr::getSub(BOp0C, RHS));
} else if (RHSV == 0) {
// Replace ((sub A, B) != 0) with (A != B)
return new ICmpInst(ICI.getPredicate(), BO->getOperand(0),
BO->getOperand(1));
}
}
break;
case Instruction::Or:

41
test/Transforms/InstCombine/prevent-cmp-merge.ll Normal file
View File

@ -0,0 +1,41 @@
; RUN: opt < %s -instcombine -S | FileCheck %s
;
; This test makes sure that InstCombine does not replace the sequence of
; xor/sub instruction followed by cmp instruction into a single cmp instruction
; if there is more than one use of xor/sub.
define zeroext i1 @test1(i32 %lhs, i32 %rhs) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: %xor = xor i32 %lhs, 5
; CHECK-NEXT: %cmp1 = icmp eq i32 %xor, 10
%xor = xor i32 %lhs, 5
%cmp1 = icmp eq i32 %xor, 10
%cmp2 = icmp eq i32 %xor, %rhs
%sel = or i1 %cmp1, %cmp2
ret i1 %sel
}
define zeroext i1 @test2(i32 %lhs, i32 %rhs) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: %xor = xor i32 %lhs, %rhs
; CHECK-NEXT: %cmp1 = icmp eq i32 %xor, 0
%xor = xor i32 %lhs, %rhs
%cmp1 = icmp eq i32 %xor, 0
%cmp2 = icmp eq i32 %xor, 32
%sel = xor i1 %cmp1, %cmp2
ret i1 %sel
}
define zeroext i1 @test3(i32 %lhs, i32 %rhs) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: %sub = sub nsw i32 %lhs, %rhs
; CHECK-NEXT: %cmp1 = icmp eq i32 %sub, 0
%sub = sub nsw i32 %lhs, %rhs
%cmp1 = icmp eq i32 %sub, 0
%cmp2 = icmp eq i32 %sub, 31
%sel = or i1 %cmp1, %cmp2
ret i1 %sel
}