Define more SchedWrites for annotating X86 instructions.

Since almost all X86 instructions can fold loads, use a multiclass to
define register/memory pairs of SchedWrites.

An X86FoldableSchedWrite represents the register version of an
instruction. It holds a reference to the SchedWrite to use when the
instruction folds a load.

This will be used inside multiclasses that define rr and rm instruction
versions together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177210 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2013-03-16 00:02:17 +00:00
parent 64110ffc9e
commit e0c489d22b

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@ -13,25 +13,71 @@
// Instructions with folded loads need to read the memory operand immediately,
// but other register operands don't have to be read until the load is ready.
// These are marked with ReadAfterLd.
// These operands are marked with ReadAfterLd.
def ReadAfterLd : SchedRead;
// Instructions with both a load and a store folded are modeled as a folded
// load + WriteRMW.
def WriteRMW : SchedWrite;
// Most instructions can fold loads, so every SchedWrite comes in two variants:
// With and without a folded load.
// Most instructions can fold loads, so almost every SchedWrite comes in two
// variants: With and without a folded load.
// An X86FoldableSchedWrite holds a reference to the corresponding SchedWrite
// with a folded load.
class X86FoldableSchedWrite : SchedWrite {
// The SchedWrite to use when a load is folded into the instruction.
SchedWrite Folded;
}
// Multiclass that produces a linked pair of SchedWrites.
multiclass X86SchedWritePair {
// Register-Memory operation.
def Ld : SchedWrite;
// Register-Register operation.
def NAME : X86FoldableSchedWrite {
let Folded = !cast<SchedWrite>(NAME#"Ld");
}
}
// Arithmetic.
def WriteALU : SchedWrite; // Simple integer ALU op.
def WriteALULd : SchedWrite; // ALU op with folded load.
def WriteIMul : SchedWrite; // Integer multiplication.
def WriteIMulLd : SchedWrite;
def WriteIDiv : SchedWrite; // Integer division.
def WriteIDivLd : SchedWrite;
def WriteLEA : SchedWrite; // LEA instructions can't fold loads.
defm WriteALU : X86SchedWritePair; // Simple integer ALU op.
defm WriteIMul : X86SchedWritePair; // Integer multiplication.
defm WriteIDiv : X86SchedWritePair; // Integer division.
def WriteLEA : SchedWrite; // LEA instructions can't fold loads.
// Integer shifts and rotates.
defm WriteShift : X86SchedWritePair;
// Loads, stores, and moves, not folded with other operations.
def WriteLoad : SchedWrite;
def WriteStore : SchedWrite;
def WriteMove : SchedWrite;
// Branches don't produce values, so they have no latency, but they still
// consume resources. Indirect branches can fold loads.
defm WriteJump : X86SchedWritePair;
// Floating point. This covers both scalar and vector operations.
defm WriteFAdd : X86SchedWritePair; // Floating point add/sub/compare.
defm WriteFMul : X86SchedWritePair; // Floating point multiplication.
defm WriteFDiv : X86SchedWritePair; // Floating point division.
defm WriteFSqrt : X86SchedWritePair; // Floating point square root.
defm WriteFRcp : X86SchedWritePair; // Floating point reciprocal.
// Vector integer operations.
defm WriteVecALU : X86SchedWritePair; // Vector integer ALU op, no logicals.
defm WriteVecShift : X86SchedWritePair; // Vector integer shifts.
defm WriteVecIMul : X86SchedWritePair; // Vector integer multiply.
// Vector bitwise operations.
// These are often used on both floating point and integer vectors.
defm WriteVecLogic : X86SchedWritePair; // Vector and/or/xor.
defm WriteShuffle : X86SchedWritePair; // Vector shuffles and blends.
// Conversion between integer and float.
defm WriteCvtF2I : X86SchedWritePair; // Float -> Integer.
defm WriteCvtI2F : X86SchedWritePair; // Integer -> Float.
defm WriteCvtF2F : X86SchedWritePair; // Float -> Float size conversion.
//===----------------------------------------------------------------------===//
// Instruction Itinerary classes used for X86