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AVX-512: implemented zext fron i1 to i16

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201502 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky 2014-02-17 07:29:33 +00:00
parent 3bc859466b
commit e139a1e0e4
2 changed files with 39 additions and 1 deletions
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4
lib/Target/X86/X86InstrAVX512.td
View File

@ -969,7 +969,9 @@ let Predicates = [HasAVX512] in {
def : Pat<(i64 (zext VK1:$src)),
(SUBREG_TO_REG (i64 0),
(KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)), sub_32bit)>;
def : Pat<(i16 (zext VK1:$src)),
(EXTRACT_SUBREG
(KMOVWrk (COPY_TO_REGCLASS VK1:$src, VK16)), sub_16bit)>;
}
// With AVX-512 only, 8-bit mask is promoted to 16-bit mask.
let Predicates = [HasAVX512] in {

36
test/CodeGen/X86/avx512-mask-op.ll
View File

@ -42,3 +42,39 @@ define i8 @shuf_test1(i16 %v) nounwind {
%mask1 = bitcast <8 x i1> %mask to i8
ret i8 %mask1
}
; CHECK: zext_test1
; CHECK: kshiftlw
; CHECK: kshiftrw
; CHECK: kmovw
; CHECK:ret
define i32 @zext_test1(<16 x i32> %a, <16 x i32> %b) {
%cmp_res = icmp ugt <16 x i32> %a, %b
%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
%res = zext i1 %cmp_res.i1 to i32
ret i32 %res
}
; CHECK: zext_test2
; CHECK: kshiftlw
; CHECK: kshiftrw
; CHECK: kmovw
; CHECK:ret
define i16 @zext_test2(<16 x i32> %a, <16 x i32> %b) {
%cmp_res = icmp ugt <16 x i32> %a, %b
%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
%res = zext i1 %cmp_res.i1 to i16
ret i16 %res
}
; CHECK: zext_test3
; CHECK: kshiftlw
; CHECK: kshiftrw
; CHECK: kmovw
; CHECK:ret
define i8 @zext_test3(<16 x i32> %a, <16 x i32> %b) {
%cmp_res = icmp ugt <16 x i32> %a, %b
%cmp_res.i1 = extractelement <16 x i1> %cmp_res, i32 5
%res = zext i1 %cmp_res.i1 to i8
ret i8 %res
}